WinChip

Template:Short description Template:Infobox CPU The WinChip series is a discontinued low-power Socket 7-based x86 processor that was designed by Centaur Technology and marketed by its parent company IDT.

Overview

Design

The design of the WinChip was quite different from other processors of the time. Instead of a large gate count and die area, IDT, using its experience from the RISC processor market, created a small and electrically efficient processor similar to the 80486, because of its single pipeline and in-order execution microarchitecture. It was of much simpler design than its Socket 7 competitors, such as AMD K5/K6, which were superscalar and based on dynamic translation to buffered micro-operations with advanced instruction reordering (out of order execution).

Use

WinChip was, in general, designed to perform well with popular applications that did few floating point calculations, if any. This included operating systems of the time and the majority of software used in businesses. It was also designed to be a drop-in replacement for the more complex, and thus more expensive, processors it was competing with. This allowed IDT/Centaur to take advantage of an established system platform (Intel's Socket 7).

Later developments

WinChip 2, an update of C6, retained the simple in-order execution pipeline of its predecessor, but added dual MMX/3DNow! processing units that could operate in superscalar execution.<ref name="WinChip2DataSheet" /> This made it the only non-AMD CPU on Socket 7 to support 3DNow! instructions. WinChip 2A added fractional multipliers and adopted a 100 MHz front side bus to improve memory access and L2 cache performance.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> It also adopted a performance rating nomenclature instead of reporting the real clock speed, similar to contemporary AMD and Cyrix processors.

Another revision, the WinChip 2B, was also planned. This featured a die shrink to 0.25 μm, but was only shipped in limited numbers.<ref name=WinChipSandpile>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>

A third model, the WinChip 3, was planned as well. This was meant to receive a doubled L1 cache, but the W3 CPU never made it to market.<ref name=WinChipSandpile />

Performance

Although the small die size and low power-usage made the processor notably inexpensive to manufacture, it never gained much market share. WinChip C6 was a competitor to the Intel Pentium and Pentium MMX, Cyrix 6x86, and AMD K5/K6. It performed adequately, but only in applications that used little floating point math. Its floating point performance was simply well below that of the Pentium and K6, being even slower than the Cyrix 6x86.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>

Decline

The industry's move away from Socket 7 and the release of the Intel Celeron processor signalled the end of the WinChip. In 1999, the Centaur Technology division of IDT was sold to VIA. Although VIA branded the processors as "Cyrix", the company initially used technology similar to the WinChip in its Cyrix III line.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>

Data

Winchip C6 (0.35 μm)

File:KL IDT WinChip C6.jpg

IDT WinChip C6

File:IDT WinChip C6 die.JPG

IDT WinChip C6 die shot

• All models supported MMX<ref name=SandpileWinChipC6>{{#invoke:citation/CS1|citation

|CitationClass=web }}</ref>

• The 88 mm² die was made using a 0.35 micron 4-layer metal CMOS technology.<ref name=SandpileWinChipC6 />
• The 64 Kib L1 Cache of the WinChip C6 used a 32 KB 2-way set associative code cache and a 32 KB 2-way set associative data cache.<ref name=SandpileWinChipC6 />

Processor model	Frequency	FSB	Mult.	L1 cache	TDP	CPU core voltage	Socket	Release date	Part number(s)	Introduction price
WinChip 180	180 MHz	60 MT/s	3	64 KiB	9.4 W	3.45—3.6 V	Template:Ubl	13 October 1997	DS180GAEM	$90
WinChip 200	200 MHz	66 MT/s	3	64 KiB	10.4 W	3.45—3.6 V	Template:Ubl	13 October 1997	DS200GAEM	$135
WinChip 225	225 MHz	75 MT/s	3	64 KiB	12.3 W	3.45—3.6 V	Template:Ubl	13 October 1997	PSME225GA
WinChip 240	240 MHz	60 MT/s	4	64 KiB	13.1 W	3.45—3.6 V	Template:Ubl	November 1997?	PSME240GA

WinChip 2 (0.35 μm)

File:KL IDT WinChip2.jpg

IDT WinChip2

• All models supported MMX<ref name=WinChipSandpile /> and 3DNow!<ref name=WinChipSandpile />
• The 95 mm² die was made using a 0.35 micron 5-layer metal CMOS technology.<ref name=WinChipSandpile />
• The 64 Kib L1 Cache of the WinChip 2 used a 32 KB 2-way set associative code cache and a 32 KB 4-way set associative data cache.

Processor model	Frequency	FSB	Mult.	L1 cache	TDP	CPU core voltage	Socket	Release date	Part number(s)	Introduction price
WinChip 2-200	200 MHz	66 MT/s	3	64 KiB	8.8 W	3.45—3.6 V	Template:Ubl		3DEE200GSA 3DFF200GSA
WinChip 2-225	225 MHz	75 MT/s	3	64 KiB	10.0 W	3.45—3.6 V	Template:Ubl		3DEE225GSA
WinChip 2-240	240 MHz	60 MT/s	4	64 KiB	10.5 W	3.45—3.6 V	Template:Ubl		3DEE240GSA
WinChip 2-250	250 MHz	83 MT/s	3	64 KiB	10.9 W	3.45—3.6 V	Template:Ubl	?

WinChip 2A (0.35 μm)

File:KL IDT WinChip2A.jpg

IDT WinChip2A

File:IDT WinChip 2A die.JPG

IDT WinChip2A die shot

• All models supported MMX<ref name="WinChip2DataSheet">{{#invoke:citation/CS1|citation

|CitationClass=web }}</ref> and 3DNow!<ref name="WinChip2DataSheet" />

• The 95 mm² die was made using a 0.35 micron 5-layer metal CMOS technology.<ref name=WinChipSandpile />
• The 64 Kib L1 Cache of the WinChip 2A used a 32 KB 2-way set associative code cache and a 32 KB 4-way set associative data cache.<ref name="WinChip2DataSheet" />

Processor model	Frequency	FSB	Mult.	L1 cache	TDP	CPU core voltage	Socket	Release date	Part number(s)	Introduction price
WinChip 2A-200	200 MHz	66 MT/s	3	64 KiB	12.0 W	3.45—3.6 V	Template:Ubl	March 1999?	3DEE200GTA
WinChip 2A-233	233 MHz	66 MT/s	3.5	64 KiB	13.0 W	3.45—3.6 V	Template:Ubl	March 1999?	3DEE233GTA
WinChip 2A-266	233 MHz	100 MT/s	2.33	64 KiB	14.0 W	3.45—3.6 V	Template:Ubl	March 1999?	3DEE266GSA
WinChip 2A-300	250 MHz	100 MT/s	2.5	64 KiB	16.0 W	3.45—3.6 V	Template:Ubl		3DEE300GSA

WinChip 2B (0.25 μm)

File:KL IDT WinChip2 W2B.jpg

IDT WinChip2 W2B

• All models supported MMX<ref name="WinChip2bDataSheet">{{#invoke:citation/CS1|citation

|CitationClass=web }}</ref> and 3DNow!<ref name="WinChip2bDataSheet" />

• The 58 mm² die was made using a 0.25 micron 5-layer metal CMOS technology.<ref name=WinChipSandpile />
• The 64 Kib L1 Cache of the WinChip 2B used a 32 KB 2-way set associative code cache and a 32 KB 4-way set associative data cache.<ref name="WinChip2bDataSheet" />
• Dual-voltage CPU: while the processor core operates at 2.8 V, the external input/output (I/O) voltages remain 3.3 V for backwards compatibility.

Processor model	Frequency	FSB	Mult.	L1 cache	TDP	CPU core voltage	Socket	Release date	Part number(s)	Introduction price
WinChip 2B-200	200 MHz	66 MT/s	3	64 KiB	6.3 W	2.7—2.9 V	Template:Ubl		3DFK200BTA
WinChip 2B-233	200 MHz	100 MT/s	2	64 KiB	6.3 W	2.7—2.9 V	Template:Ubl

WinChip 3 (0.25 μm)

• All models supported MMX<ref name="WinChip3DataSheet">{{#invoke:citation/CS1|citation

|CitationClass=web }}</ref> and 3DNow!<ref name="WinChip3DataSheet" />

• The 75 mm² die was made using a 0.25 micron 5-layer metal CMOS technology.<ref name=WinChipSandpile />
• The 128 Kib L1 Cache of the WinChip 3 used a 64 KB 2-way set associative code cache and a 64 KB 4-way set associative data cache.<ref name="WinChip3DataSheet" />
• Dual-voltage CPU: while the processor core operates at 2.8 volts, the external input/output (I/O) voltages remain 3.3 volts for backwards compatibility.

Processor model	Frequency	FSB	Mult.	L1 cache	TDP	CPU core voltage	Socket	Release date	Part number(s)	Introduction price
WinChip 3-233	200 MHz	66 MT/s	3	128 KiB	? W	2.7—2.9 V	Template:Ubl
WinChip 3-266	233 MHz	66 MT/s	3.5	128 KiB	8.4 W	2.7—2.9 V	Template:Ubl	Samples only	FK233GDA
WinChip 3-300	233 MHz	100 MT/s	2.33	128 KiB	8.4 W	2.7—2.9 V	Template:Ubl	Samples only	FK300GDA
WinChip 3-300	266 MHz	66 MT/s	4	128 KiB	9.3 W	2.7—2.9 V	Template:Ubl
WinChip 3-333	250 MHz	100 MT/s	2.5	128 KiB	8.8 W	2.7—2.9 V	Template:Ubl
WinChip 3-333	266 MHz	100 MT/s	2.66	128 KiB	9.3 W	2.7—2.9 V	Template:Ubl

See also

• List of VIA microprocessors

External links

• Template:Webarchive
• CPU-INFO: IDT C6, in-depth processor history
• VIA CPU Overview at CPUShack
• WinChip architecture at Sandpile.org
• WinChip2 architecture at Sandpile.org
• CPUPages W2B
• Template:Usurped
• Winchip2B