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8b/10b encoding
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{{Short description|Line code mapping 8-bit words to 10-bit symbols}} {{redirect|8/10|the dates|August 10|and|October 8}} {{use mdy dates|date=September 2021}} {{Use American English|date = March 2019}} {{More citations needed|date=January 2015}} {{Fibre Channel}} In [[telecommunication]]s, '''8b/10b''' is a [[line code]] that maps [[8-bit]] words to [[10-bit]] [[Symbol (data)|symbol]]s to achieve [[DC balance]] and bounded disparity, and at the same time provide enough state changes to allow reasonable [[clock recovery]]. This means that the difference between the counts of ones and zeros in a string of ''at least'' 20 bits is no more than two, and that there are not more than five ones or zeros in a row. This helps to reduce the demand for the lower bandwidth limit of the channel necessary to transfer the signal.<ref>{{Cite journal |journal=IEEE Transactions on Communications |volume=45 |issue=3 |date=March 1997 |title=Performance Assessment of DC-Free Multimode Codes |author=Kees Schouhamer Immink |author-link=Kees Schouhamer Immink |pages=293β299 |doi=10.1109/26.558690 |quote=The ''dc-balanced'' or ''dc-free'' codes, as they are often called, have a long history and their application is certainly not confined to recording practice.}}</ref> An 8b/10b code can be implemented in various ways with focus on different performance parameters. One implementation was designed by K. Odaka for the [[Digital Audio Tape|DAT]] digital audio recorder.<ref>{{cite patent |country=US |number=4,456,905 |title=Method and apparatus for encoding binary data |pubdate=1984-06-26}}</ref> [[Kees Schouhamer Immink]] designed an 8b/10b code for the [[Digital Compact Cassette|DCC]] audio recorder.<ref>{{cite patent |country=US |number=4,620,311 |title=Method of transmitting information, encoding device for use in the method, and decoding device for use in the method |pubdate=1986-10-28}}</ref> The IBM implementation was described in 1983 by [[Al Widmer]] and [[Peter Franaszek]].<ref>{{cite journal | url = http://domino.research.ibm.com/tchjr/journalindex.nsf/0/b4e28be4a69a153585256bfa0067f59a?OpenDocument | title = A DC-Balanced, Partitioned-Block, 8B/10B Transmission Code | author = Al X. Widmer, Peter A. Franaszek | journal = IBM Journal of Research and Development | volume = 27 | issue = 5 | pages = 440β451 | year = 1983 | doi = 10.1147/rd.275.0440 | access-date = April 5, 2005 | archive-date = May 30, 2009 | archive-url = https://web.archive.org/web/20090530123123/http://domino.research.ibm.com/tchjr/journalindex.nsf/0/b4e28be4a69a153585256bfa0067f59a?OpenDocument | url-status = dead | url-access = subscription }}</ref><ref>{{cite patent |country=US |number=4,486,739 |title=Byte oriented DC balanced (0,4) 8B/10B partitioned block transmission code |pubdate=1984-12-04}}</ref><!--[[User:Kvng/RTH]]-->
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