Editing Addressing mode (section)

{{Short description|Aspect of the instruction set architecture of CPUs}}
{{about|addressing fields in instructions|IBM addressing bits in the [[Program status word|PSW]]|IBM System/370-XA#31-bit virtual addressing|and|z/Architecture#Addressing modes}}
{{More citations needed|date=May 2009}}
'''Addressing modes''' are an aspect of the [[instruction set architecture]] in most [[central processing unit]] (CPU) designs. The various addressing modes that are defined in a given instruction set architecture define how the [[machine code|machine language]] [[instruction (computer science)|instructions]] in that architecture identify the [[operand]](s) of each instruction. An addressing mode specifies how to calculate the effective [[memory address]] of an operand by using information held in [[processor register|register]]s and/or constants contained within a machine instruction or elsewhere.

In [[computer programming]], addressing modes are primarily of interest to those who write in [[assembly language]]s and to [[compiler]] writers.  For a related concept see [[orthogonal instruction set]] which deals with the ability of any instruction to use any addressing mode.