Editing Berkeley RISC (section)

{{short description|Research project into RISC-based microprocessor design}}
'''Berkeley RISC''' is one of two seminal research projects into [[reduced instruction set computer]] (RISC) based [[microprocessor]] design taking place under the [[DARPA|Defense Advanced Research Projects Agency]] [[VLSI Project]]. RISC was led by [[David Patterson (computer scientist)|David Patterson]] (who coined the term RISC) at the [[University of California, Berkeley]] between 1980 and 1984.<ref name="coinrisk">{{cite book |title=Milestones in Computer Science and Information Technology |url=https://archive.org/details/milestonesincomp0000reil |url-access=registration |last=Reilly |first=Edwin D. |year=2003 |isbn=1573565210 |page=[https://archive.org/details/milestonesincomp0000reil/page/50 50] |publisher=Bloomsbury Academic }}</ref> The other project took place a short distance away at [[Stanford University]] under their [[Stanford MIPS|MIPS]] effort starting in 1981 and running until 1984.

Berkeley's project was so successful that it became the name for all similar designs to follow; even the MIPS would become known as a "RISC processor". The Berkeley RISC design was later commercialized by [[Sun Microsystems]] as the [[SPARC]] architecture, and inspired the [[ARM architecture]].<ref>{{cite news|last1=Chisnal|first1=David|title=Understanding ARM Architectures |url=http://www.informit.com/articles/article.aspx?p=1620207&seqNum=2 |access-date=13 October 2015 |publisher=Informit|date=2010-08-23}}</ref>