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CPU cache
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{{Short description|Hardware cache of a central processing unit}} A '''CPU cache''' is a [[hardware cache]] used by the [[central processing unit]] (CPU) of a [[computer]] to reduce the average cost (time or energy) to access [[data (computer science)|data]] from the [[main memory]].<ref>{{cite web |author=Torres |first=Gabriel |date=September 12, 2007 |title=How The Cache Memory Works |url=https://hardwaresecrets.com/how-the-cache-memory-works/}}</ref> A cache is a smaller, faster memory, located closer to a [[processor core]], which stores copies of the data from frequently used main [[memory location]]s. Most CPUs have a hierarchy of multiple cache [[#MULTILEVEL|levels]] (L1, L2, often L3, and rarely even L4), with different instruction-specific and data-specific caches at level 1.<ref>{{Cite journal |last1=Su |first1=Chao |last2=Zeng |first2=Qingkai |date=2021-06-10 |editor-last=Nicopolitidis |editor-first=Petros |title=Survey of CPU Cache-Based Side-Channel Attacks: Systematic Analysis, Security Models, and Countermeasures |journal=Security and Communication Networks |language=en |volume=2021 |pages=1β15 |doi=10.1155/2021/5559552 |issn=1939-0122|doi-access=free }}</ref> The cache memory is typically implemented with [[static random-access memory]] (SRAM), in modern CPUs by far the largest part of them by chip area, but SRAM is not always used for all levels (of I- or D-cache), or even any level, sometimes some latter or all levels are implemented with [[eDRAM]]. Other types of caches exist (that are not counted towards the "cache size" of the most important caches mentioned above), such as the [[translation lookaside buffer]] (TLB) which is part of the [[memory management unit]] (MMU) which most CPUs have.
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