Editing Cell (processor) (section)

{{short description|Multi-core microprocessor microarchitecture}}
{{Use mdy dates|date=April 2025}}
{{Infobox CPU architecture
|name = Cell Broadband Engine (Cell/B.E.)
|designer = STI ([[Sony]], [[Toshiba]] and [[IBM]])
|bits = [[64-bit]]
|introduced = {{start date and age|2006|11}}
|version = [[PowerPC 2.02]]<ref name="powerpc_archguide">{{Cite web |date=November 16, 2005 |title=PowerPC Architecture Book, Version 2.02 |url=https://www.ibm.com/developerworks/systems/library/es-archguide-v2.html |archive-url=https://web.archive.org/web/20201129235141/https://www.ibm.com/developerworks/systems/library/es-archguide-v2.html |archive-date=November 29, 2020 |website=[[IBM]]}}</ref>
|design = [[RISC]]
|type = [[Load–store architecture|Load–store]]
|encoding = Fixed/Variable (Book E)
|branching = [[Status register|Condition code]]
|endianness = [[Bi-endian|Big/Bi]]
|extensions =
|open = 
|gpr = 
|fpr =
|vpr =
|image=CELL BE logo.svg{{!}}class=skin-invert
|successor =
}}

The '''Cell Broadband Engine''' (Cell/B.E.) is a 64-bit [[multi-core processor]] and [[microarchitecture]] developed by [[Sony]], [[Toshiba]], and [[IBM]]—an alliance known as "STI". It combines a general-purpose [[PowerPC]] core, called the Power Processing Element (PPE), with multiple specialized [[coprocessor]]s, known as Synergistic Processing Elements (SPEs), which accelerate tasks such as [[multimedia]] and [[vector processing]].<ref name="ibmrpaper">{{Cite journal |last=Gschwind |first=Michael |last2=Hofstee |first2=H. Peter |last3=Flachs |first3=Brian |last4=Hopkins |first4=Martin |last5=Watanabe |first5=Yukio |last6=Yamazaki |first6=Takeshi |date=March–April 2006 |title=Synergistic Processing in Cell's Multicore Architecture |url=https://www.cs.tufts.edu/comp/150IPL/papers/gschwind06synergistic.pdf |journal=IEEE Micro |publisher=IEEE |volume=26 |issue=2 |pages=10–24 |doi=10.1109/MM.2006.41 |s2cid=17834015}}</ref>

The architecture was developed over a four-year period beginning in March 2001, with Sony reporting a development budget of approximately {{US$|400 million|link=yes}}.<ref>{{Cite web |title=Cell Designer talks about PS3 and IBM Cell Processors |url=http://ps3.qj.net/Cell-Designer-talks-about-PS3-and-IBM-Cell-Processors/pg/49/aid/14805 |url-status=dead |archive-url=https://web.archive.org/web/20060821114005/http://ps3.qj.net/Cell-Designer-talks-about-PS3-and-IBM-Cell-Processors/pg/49/aid/14805 |archive-date=August 21, 2006 |access-date=March 22, 2007}}</ref> Its first major commercial application was in Sony's [[PlayStation 3]] home video game console, released in 2006. In 2008, a modified version of the Cell processor powered IBM's [[Roadrunner (supercomputer)|Roadrunner]], the first supercomputer to sustain one [[petaFLOPS]]. Other applications include high-performance computing systems from [[Mercury Computer Systems]] and specialized [[arcade system boards]].

Cell emphasizes [[memory coherence]], power efficiency, and peak [[Bandwidth (computing)|computational throughput]], but its design presented significant challenges for software development.<ref>{{Cite web |last=Shankland |first=Stephen |date=February 22, 2006 |title=Octopiler seeks to arm Cell programmers |url=http://news.cnet.com/Octopiler+seeks+to+arm+Cell+programmers/2100-1007_3-6042132.html |access-date=March 22, 2007 |website=CNET}}</ref> IBM offered a [[Linux]]-based [[software development kit]] to facilitate programming on the platform.<ref>{{Cite news |date=November 10, 2005 |title=Cell Broadband Engine Software Development Kit Version 1.0 |url=https://lwn.net/Articles/159564/ |access-date=March 22, 2007 |publisher=LWN}}</ref>{{POWER, PowerPC, and Power ISA}}