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Fin field-effect transistor
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{{short description|Type of non-planar transistor}} {{about|fin-shaped field-effect transistor|Ferroelectric memory with a ferroelectric FET gate|FeFET}} [[File:Doublegate FinFET-en.svg|thumb|A double-gate FinFET device]] A '''fin field-effect transistor''' ('''FinFET''') is a [[multigate device]], a [[MOSFET]] (metal–oxide–semiconductor [[field-effect transistor]]) built on a [[Wafer (electronics)|substrate]] where the gate is placed on two, three, or four sides of the channel or wrapped around the channel (gate all around), forming a double or even multi gate structure. These devices have been given the generic name "FinFETs" because the source/drain region forms fins on the [[silicon]] surface. The FinFET devices exhibit significantly faster [[switching time]]s and higher [[current density]] than planar [[CMOS]] (complementary metal–oxide–semiconductor) technology,<ref name="auto">{{Cite journal| doi = 10.25103/jestr.151.14| issn = 1791-2377| volume = 15| issue = 1| pages = 110–115| last = Kamal| first = Kamal Y.| title = The Silicon Age: Trends in Semiconductor Devices Industry| journal = Journal of Engineering Science and Technology Review| accessdate = 2022-05-26| date = 2022| s2cid = 249074588| url = http://www.jestr.org/downloads/Volume15Issue1/fulltext141512022.pdf}}</ref> resulting in enhanced performance and power efficiency.[https://anysilicon.com/finfets-the-ultimate-guide/] FinFET is a type of non-planar [[transistor]], or "3D" transistor.<ref>{{cite web |title=What is Finfet? |url=https://www.computerhope.com/jargon/f/finfet.htm |website=Computer Hope |access-date=4 July 2019 |date=April 26, 2017}}</ref> It is the basis for modern [[nanoelectronic]] [[semiconductor device fabrication]]. Microchips utilizing FinFET gates first became commercialized in the first half of the 2010s, and became the dominant gate design at [[14 nm]], [[10 nm process|10 nm]] and [[7 nm]] process [[Semiconductor node|nodes]]. It is common for a single FinFET transistor to contain several fins, arranged side by side and all covered by the same gate, that act electrically as one. The number of fins can be varied to adjust drive strength and performance,<ref>{{Cite web|url=https://www.anandtech.com/show/4313/intel-announces-first-22nm-3d-trigate-transistors-shipping-in-2h-2011|title=Intel Announces first 22nm 3D Tri-Gate Transistors, Shipping in 2H 2011|first=Anand Lal|last=Shimpi|website=AnandTech|date=4 May 2011|access-date=18 January 2022}}</ref> with drive strength increasing with a higher number of fins.<ref>{{cite web | url=https://semiwiki.com/events/300552-vlsi-technology-forum-short-course-logic-devices/ | title=VLSI Symposium - TSMC and Imec on Advanced Process and Devices Technology Toward 2nm | date=25 February 2024 }}</ref>
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