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Intel MCS-51
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{{Short description|Single chip microcontroller series by Intel}} {{Infobox CPU | name = Intel 8051 | image = KL Intel P8051.jpg | image_size = | alt = | caption = Intel P8051 [[microcontroller]] <!----------------- General Info -----------------> | produced-start = | produced-end = | soldby = | designfirm = | manuf1 = <!-- manuf1..5 --> | cpuid = | code = <!----------------- Performance ------------------> | slowest = | fastest = | slow-unit = | fast-unit = | fsb-slowest = | fsb-fastest = | fsb-slow-unit = | fsb-fast-unit = | hypertransport-slowest = | hypertransport-fastest = | hypertransport-slow-unit = | hypertransport-fast-unit = | qpi-slowest = | qpi-fastest = | qpi-slow-unit = | qpi-fast-unit = | dmi-slowest = | dmi-fastest = | dmi-slow-unit = | dmi-fast-unit = | data-width = | address-width = | virtual-width = <!-------------------- Cache ---------------------> | l1cache = | l2cache = | l3cache = | l4cache = | llcache = <!------- Architecture and classification --------> | application = | size-from = | size-to = | arch1 = | microarch = | arch = | instructions = | extensions = <!----------- Physical specifications ------------> | transistors = | numcores = | gpu = | co-processor = | pack1 = <!-- pack1..9 --> | sock1 = <!-- sock1..9 --> <!--------- Products, models, variants -----------> | core1 = <!-- core1..9 --> | pcode1 = <!-- pcode1..9 --> | model1 = <!-- model1..9 --> | brand1 = <!-- brand1..9 --> | variant = <!------------------ History -------------------> | predecessor = [[Intel MCS-48]] | successor = Intel MCS-151 <!-- Not linking because it is a redirect to this article --> }} The '''Intel MCS-51''' (commonly termed '''8051''') is a single-chip [[microcontroller]] (MCU) series developed by [[Intel]] in 1980 for use in [[embedded system]]s. The architect of the Intel MCS-51 instruction set was [[John H. Wharton]].<ref>{{cite web |author=John Wharton |author-link=John H. Wharton |url=https://drive.google.com/uc?export=download&id=0B9rh9tVI0J5mZTFmZjRjZTItNDQ0Yy00MDFlLTgzZTgtM2I3MzVkMTliNTFl |title=An Introduction to the Intel MCS-51 Single-Chip Microcomputer Family |id=Application Note AP-69 |date=May 1980 |publisher=Intel Corporation}}</ref><ref name="Intel8051OralHistory">{{Citation | url = http://archive.computerhistory.org/resources/text/Oral_History/Intel_8051/102658339.05.01.acc.pdf | title = Intel 8051 Microprocessor Oral History Panel | access-date = November 17, 2018 | publisher = [[Computer History Museum]] | date = September 16, 2008 | archive-url = https://web.archive.org/web/20120225062256/http://archive.computerhistory.org/resources/text/Oral_History/Intel_8051/102658339.05.01.acc.pdf | archive-date = February 25, 2012 | url-status = dead }}.</ref> Intel's original versions were popular in the 1980s and early 1990s, and enhanced [[binary compatible]] derivatives remain popular today. It is a [[complex instruction set computer]] with separate memory spaces for program instructions and data. Intel's original MCS-51 family was developed using N-type metal–oxide–semiconductor ([[NMOS logic|NMOS]]) technology, like its predecessor [[Intel MCS-48]], but later versions, identified by a letter C in their name (e.g., 80C51) use complementary metal–oxide–semiconductor ([[CMOS]]) technology and consume less power than their NMOS predecessors. This made them more suitable for battery-powered devices. The family was continued in 1996 with the enhanced [[8-bit]] MCS-151 and the 8/[[16-bit|16]]/[[32-bit]] MCS-251 family of binary compatible microcontrollers.<ref name="1+2-51"/> While Intel no longer manufactures the MCS-51, MCS-151 and MCS-251 family, enhanced [[binary compatible]] derivatives made by numerous vendors remain popular today. Some derivatives integrate a [[digital signal processor]] (DSP) or a [[floating-point unit]] (coprocessor, FPU). Beyond these physical devices, several companies also offer MCS-51 derivatives as [[IP core]]s for use in [[field-programmable gate array]] (FPGA) or [[application-specific integrated circuit]] (ASIC) designs.
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