Editing Microsequencer (section)

{{Short description|Part of the control unit of a CPU}}
[[India|In]] [[computer architecture]] and [[computer engineering|engineering]], a '''sequencer''' or '''microsequencer'''  generates the addresses used to step through the [[microprogram]] of a [[control store]]. It is used as a part of the [[control unit]] of a [[Central processing unit|CPU]] or as a stand-alone generator for address ranges.

Usually the addresses are generated by some combination of a counter, a field from a microinstruction, and some subset of the [[instruction register]].  A counter is used for the typical case, that the next microinstruction is the one to execute.  A field from the microinstruction is used for jumps, or other logic.

Since CPUs implement an instruction set, it's very useful to be able to decode the instruction's [[bit]]s directly into the sequencer, to select a set of microinstructions to perform a CPU's instructions.

Most modern CISC processors use a combination of pipelined logic to process lower complexity opcodes which can be completed in one clock cycle, and microcode to implement ones that take multiple clock cycles to complete.

One of the first integrated microcoded processors was the [[IBM PALM processor|IBM PALM Processor]], which emulated all of the processor's instruction in microcode and was used on the [[IBM 5100]], one of the first personal computers.

Recent examples of similar open-sourced microsequencer-based processors are the MicroCore Labs [https://github.com/MicroCoreLabs/Projects/tree/master/MCL86 MCL86],  [https://github.com/MicroCoreLabs/Projects/tree/master/MCL51 MCL51], and [https://github.com/MicroCoreLabs/Projects/tree/master/MCL65 MCL65] cores which emulate the Intel 8086/8088, 8051 and MOS 6502 instruction sets entirely in microcode.