Editing Non-volatile random-access memory (section)

{{short description|Type of computer memory}}
{{Broader|Non-volatile memory}}
{{See also|Nonvolatile BIOS memory}}
{{Memory types}}
[[File:DS1225.JPG | thumb | right | Non-volatile RAM takes various form factors including this tall IC with pins for a socket or soldering beneath.]]
'''Non-volatile random-access memory''' ('''NVRAM''') is [[random-access memory]] that retains data without applied power. This is in contrast to [[dynamic random-access memory]] (DRAM) and [[static random-access memory]] (SRAM), which both maintain data only for as long as power is applied, or forms of [[Sequential access memory|sequential-access memory]] such as [[magnetic tape]], which cannot be randomly accessed but which retains data indefinitely without electric power.

[[Read-only memory]] devices can be used to store system [[firmware]] in [[embedded system]]s such as an automotive ignition system control or home appliance. They are also used to hold the initial processor instructions required to [[Bootstrapping|bootstrap]] a computer system. Read-write memory such as NVRAM can be used to store calibration constants, passwords, or setup information, and may be integrated into a [[microcontroller]].

If the main memory of a computer system were non-volatile, it would greatly reduce the time required to start a system after a power interruption.  Current existing types of semiconductor non-volatile memory have limitations in memory size, power consumption, or operating life that make them impractical for main memory. Development is going on for the use of non-volatile memory chips as a system's main memory, as [[persistent memory]]. A standard for persistent memory known as [[NVDIMM#Types|NVDIMM-P]] has been published in 2021.<ref>{{cite press release|url=https://www.jedec.org/news/pressreleases/jedec-ddr5-nvdimm-p-standards-under-development|title=JEDEC DDR5 & NVDIMM-P Standards Under Development|date=2017-03-30|publisher=[[JEDEC]]}}</ref><ref>{{cite press release|url=https://www.jedec.org/news/pressreleases/jedec-hold-workshops-ddr5-lpddr5-nvdimm-p-standards|title=JEDEC to Hold Workshops for DDR5, LPDDR5 & NVDIMM-P Standards|date=2019-09-05|publisher=JEDEC}}</ref><ref>{{cite press release|url=https://www.jedec.org/news/pressreleases/jedec-publishes-ddr4-nvdimm-p-bus-protocol-standard|title=JEDEC Publishes DDR4 NVDIMM-P Bus Protocol Standard|date=2021-02-17|publisher=JEDEC}}</ref>