Editing Nucleus RTOS (section)

{{Short description|Real-time operating system}}
{{Infobox OS
| name = Nucleus RTOS
| logo = 
| screenshot = 
| caption = 
| developer = [[Mentor Graphics]] Corp., a [[Siemens]] Business
| programmed in = [[C (programming language)|C]]
| family = [[POSIX]], [[TRON project|TRON]]
| working state = Current
| source model = [[Closed source]]
| released = {{Start date and age|1993}}
| latest release version = 3.x, 2017.02
| latest release date = {{Start date and age|2017|05|15}}
| marketing target = [[Embedded system]]s, [[Internet of things|IoT]]
| language = English
| supported platforms = [[ARM architecture|ARM]], [[NXP]], [[MIPS architecture|MIPS]], [[Texas Instruments|TI]], [[PowerPC]], Altera [[Nios II]], [[Xilinx]] [[MicroBlaze]], [[Renesas Electronics|Renesas]] [[SuperH]], [[Infineon]], [[Atmel AT91SAM]], [[RISC-V]], others<ref>{{cite web |url=http://www.mentor.com/products/embedded_software/cpu/ |title=Nucleus OS Supported Processors |website=www.mentor.com}}</ref>
| kernel type = [[Real-time operating system|Real-time]] [[microkernel]] with hybrid support
| license = [[Proprietary software|Proprietary]]
| website = {{URL|www.plm.automation.siemens.com/global/en/products/embedded/nucleus-rtos.html|Nucleus website}}
}}
'''Nucleus RTOS''' is a [[real-time operating system]] (RTOS) produced by the Embedded Software Division of [[Mentor Graphics]], a [[Siemens]] Business, supporting [[32-bit computing|32-]] and [[64-bit computing|64-bit]] [[embedded system]] platforms. The [[operating system]] (OS) is designed for [[Real-time computing|real-time]] [[embedded system]]s for medical, industrial, consumer, aerospace, and [[Internet of things]] (IoT) uses. Nucleus was released first in 1993. The latest version is 3.x, and includes features such as [[power management]], process model, 64-bit support, safety certification, and support for [[heterogeneous computing]] multi-core [[system on a chip]] (SOCs) processors.

Nucleus process model adds space domain partitioning for task and module isolation on SOCs with either a [[memory management unit]] (MMU) or [[memory protection unit]] (MPU), such as those based on ARMv7/8 Cortex-A/R/M cores.