Editing Orthogonal instruction set (section)

{{Short description|Type of computer instruction set}}
In [[computer engineering]], an '''orthogonal instruction set''' is an [[instruction set architecture]] where all instruction types can use all [[addressing mode]]s.  It is "[[Orthogonality|orthogonal]]" in the sense that the instruction type and the addressing mode may vary independently. An orthogonal instruction set does not impose a limitation that requires a certain instruction to use a specific register<ref name="NL10">{{cite book|last1=Null|first1=Linda|last2=Lobur|first2=Julia|title=The Essentials of Computer Organization and Architecture|year=2010|publisher=Jones & Bartlett Publishers|isbn=978-1449600068|pages=287–288}}</ref> so there is little overlapping of instruction functionality.<ref>{{citation|last=Tariq|first=Jamil|year=1995|issue=August/September|title=RISC vs CISC: Why less is more|journal=IEEE Potentials|url=https://www.researchgate.net/publication/3227233|access-date=7 May 2019}}</ref>

Orthogonality was considered a major goal for processor designers in the 1970s, and the [[VAX-11]] is often used as the benchmark for this concept. However, the introduction of [[reduced instruction set computer|RISC]] design philosophies in the 1980s significantly reversed the trend. 

Modern CPUs often simulate orthogonality in a preprocessing step before performing the actual tasks in a RISC-like core. This "simulated orthogonality" in general is a broader concept, encompassing the notions of [[Coupling (computer programming)|decoupling]] and completeness in [[Library (computing)|function libraries]], like in the mathematical concept: an [[orthogonal functions|orthogonal function set]] is easy to use as a basis into expanded functions, ensuring that parts don’t affect another if one part is changed.