Editing Phase-locked loop (section)

{{Short description|Electronic control system}}
{{Redirect|PLL|other uses|PLL (disambiguation)}}
{{More footnotes|date=June 2022}}

A '''phase-locked loop''' or '''phase lock loop''' ('''PLL''') is a [[control system]] that generates an output [[Signal (electrical engineering)|signal]] whose [[phase (waves)|phase]] is fixed relative to the phase of an input signal. Keeping the input and output phase in lockstep also implies keeping the input and output frequencies the same, thus a phase-locked loop can also track an input frequency. Furthermore, by incorporating a [[frequency divider]], a PLL can generate a stable frequency that is a multiple of the input frequency.

These properties are used for clock synchronization, [[demodulation]], [[frequency synthesis]], [[clock multiplier]]s, and signal recovery from a noisy communication channel. Since 1969, a single [[integrated circuit]] can provide a complete PLL building block, and nowadays have output frequencies from a fraction of a [[hertz]] up to many [[gigahertz]]. Thus, PLLs are widely employed in [[radio]], [[telecommunications]], [[computer]]s (e.g. to distribute precisely timed [[clock signal]]s in [[microprocessor]]s), [[grid-tie inverter]]s (electronic power converters used to integrate [[Direct current|DC]] renewable resources and storage elements such as [[photovoltaics]] and [[Electric battery|batteries]] with the power grid), and other electronic applications.