Editing Planar process (section)

{{Short description|Process used to make microchips}}
[[File:74LS244 F 8314 annotated sm.jpg|thumb|right|Annotated die photo of a Fairchild chip]]
The '''planar process''' is a [[semiconductor device fabrication|manufacturing process]] used in the [[semiconductor industry]] to build individual components of a [[transistor]], and in turn, connect those transistors together. It is the primary process by which [[silicon]] [[integrated circuit]] chips are built, and it is the most commonly used method of producing [[Junction (electricity)|junctions]] during the manufacture of [[semiconductor device]]s.<ref name=":0">{{Cite book |url=http://oxfordreference.com/view/10.1093/acref/9780198725725.001.0001/acref-9780198725725 |title=A Dictionary of Electronics and Electrical Engineering |date=2018 |publisher=Oxford University Press |isbn=978-0-19-872572-5 |editor-last=Butterfield |editor-first=Andrew J. |volume=1 |language=en |doi=10.1093/acref/9780198725725.001.0001 |editor-last2=Szymanski |editor-first2=John}}</ref> The process utilizes the [[surface passivation]] and [[thermal oxidation]] methods.

The planar process was developed at [[Fairchild Semiconductor]] in 1959 and process proved to be one of the most important single advances in semiconductor technology.<ref name=":0" />