Editing SBus (section)

{{redir|SBUS|the former US national bank|Second Bank of the United States}}

{{Infobox Computer Hardware Bus
| name        = SBus
| image       = Sbus_slots.jpg
| caption     = Four SBus connectors (top of photograph)
| invent-date = {{Start date and age|1989}}
| invent-name = [[Sun Microsystems]]
| super-name  = [[Peripheral Component Interconnect|PCI]]
| super-date  = 1997
| width       = 32
| numdev      = 8 masters, unlimited slaves
| speed       = 16.67 MHz - 25 MHz
| style       = p
}}
[[Image:Sbus cards.jpg|thumb|right|Two SBus cards]]
[[Image:Sbus male connector.jpg|thumb|right |upright=1.8 |SBus male connector]]
'''SBus''' is a [[computer bus]] system that was used in most [[SPARC]]-based computers (including all [[SPARCstation]]s) from [[Sun Microsystems]] and others during the 1990s. It was introduced by Sun in 1989 to be a high-speed bus counterpart to their high-speed SPARC processors, replacing the earlier (and by this time, outdated) [[VMEbus]] used in their [[Motorola]] [[68020]]- and [[68030]]-based systems and early SPARC boxes. When Sun moved to open the SPARC definition in the early 1990s, SBus was likewise standardized and became IEEE-1496. In 1997 Sun started to migrate away from SBus to the [[Peripheral Component Interconnect]] (PCI) bus, and today SBus is no longer used.<ref name="pci">{{cite web |title= PCI:SBus Comparison |publisher= Sun Microsystems |date= March 1999 |url= https://download.oracle.com/docs/cd/E19620-01/805-7410-10/805-7410-10.pdf |access-date= May 25, 2011 }}</ref>

The industry's first third-party SBus cards were announced in 1989 by Antares Microsystems; these were a [[10BASE2]] Ethernet controller, a SCSI-SNS host adapter, a parallel port, and an 8-channel serial controller.

The specification was published by Edward H. Frank and James D. Lyle.<ref name="pci"/>
A technical guide to the bus was published in 1992 in book form by Lyle,<ref>{{cite book |title= SBus Information Applications and Experience |author= James D. Lyle |publisher= Springer-Verlag |year= 1992 |isbn= 978-0-387-97862-8 |url-access= registration |url= https://archive.org/details/sbusinformationa00lyle_0 }}</ref> who founded Troubador Technologies. Sun also published a set of books as a "developer's kit" to encourage third-party products.<ref>{{cite book |title= SBus handbook |author= Susan A. Mason |publisher= Sun Microsystems |year= 1994 |isbn= 978-0-13-107210-7 }}</ref>

At the peak of the market over 250 manufacturers were listed in the SBus Product Directory, which was renamed to the SPARC Product Directory in 1996.

SBus is in many ways a "clean" design. It was targeted only to be used with SPARC processors, so most cross-platform issues were not a consideration. SBus is based on a [[big-endian]] [[32-bit]] address and data bus, can run at speeds ranging from 16.67&nbsp;MHz to 25&nbsp;MHz, and is capable of transferring up to 100 MB/s. Devices are each mapped onto a 28-bit address space (256 MB). Only eight masters are supported, although there can be an unlimited number of slaves.

When the [[64-bit]] [[UltraSPARC]] was introduced, SBus was modified to support extended transfers of a 64 bits doubleword per cycle to produce a 200 MB/s 64-bit bus. This variant of the SBus architecture used the same form factor and was backward-compatible with existing devices, as extended transfers are an optional feature.

SBus cards had a very compact form factor for the time. A single-width card was {{convert |83.82 |mm}} wide by {{convert |146.7 |mm}} long and is designed to be mounted parallel to the motherboard.  This allowed for three expansion slots in the slim "[[pizza box form factor|pizza box]]" enclosure of the [[SPARCstation 1]].<ref>{{cite book |doi= 10.1109/CMPCON.1990.63671|chapter= Sun's SPARCstation 1: A workstation for the 1990s|title= Digest of Papers Compcon Spring '90. Thirty-Fifth IEEE Computer Society International Conference on Intellectual Leverage|pages= 184–188|year= 1990|last1= Bechtolsheim|first1= A.V.|last2= Frank|first2= E.H.|isbn= 0-8186-2028-5|s2cid= 20894045}}</ref>  The design also allows for double- or triple-width cards that take up two or three slots, as well as double-height (two 3x5 inch boards mounted in a "sandwich" configuration) cards.

SBus was originally announced as both a [[system bus]] and a peripheral interconnect that allowed input and output devices relatively low latency access to memory.<ref>{{cite book |doi= 10.1109/CMPCON.1990.63672|chapter= The SBus: Sun's high performance system bus for RISC workstations|title= Digest of Papers Compcon Spring '90. Thirty-Fifth IEEE Computer Society International Conference on Intellectual Leverage|pages= 189–194|year= 1990|last1= Frank|first1= E.H.|isbn= 0-8186-2028-5|s2cid= 25815415}}</ref> However, soon memory and [[central processing unit]] (CPU) speeds outpaced I/O performance. Within a year some Sun systems used [[MBus (SPARC)|MBus]], another interconnection standard, as a CPU—memory bus. The SBus served as an input/output bus for the rest of its lifetime.