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Very long instruction word
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{{Short description|Processor design that offloads complexity to the compiler}} {{More citations needed|date=March 2014}} '''Very long instruction word''' ('''VLIW''') refers to [[instruction set architecture]]s that are designed to exploit [[instruction-level parallelism]] (ILP). A VLIW processor allows programs to explicitly specify instructions to execute in [[parallel computing|parallel]], whereas conventional [[central processing unit]]s (CPUs) mostly allow programs to specify instructions to execute in sequence only. VLIW is intended to allow higher performance without the complexity inherent in some other designs. The traditional means to improve performance in processors include dividing instructions into sub steps so the instructions can be executed partly at the same time (termed ''pipelining''), dispatching individual instructions to be executed independently, in different parts of the processor (''[[superscalar]] architectures''), and even executing instructions in an order different from the program (''[[out-of-order execution]]'').<ref name=":0">{{Cite web |date=2020-12-01 |title=Very Long Instruction Word (VLIW) Architecture |url=https://www.geeksforgeeks.org/very-long-instruction-word-vliw-architecture/ |access-date=2022-10-14 |website=GeeksforGeeks |language=en-us}}</ref> These methods all complicate hardware (larger circuits, higher cost and energy use) because the processor must make all of the decisions internally for these methods to work. In contrast, the VLIW method depends on the programs providing all the decisions regarding which instructions to execute simultaneously and how to resolve conflicts. As a practical matter, this means that the [[compiler]] (software used to create the final programs) becomes more complex, but the hardware is simpler than in many other means of parallelism.
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