Editing Von Neumann architecture (section)

{{Short description|Computer architecture where code and data share a common bus}}
{{See also|Stored-program computer|Universal Turing machine#Stored-program computer}}
{{Distinguish|text=[[self-replicating machine|Von Neumann machines]]}}
{{Use American English|date = March 2019}}
{{Use mdy dates|date=September 2012}}
<!--By English typography, the letter "v" in "von" should never be in uppercase — except in titles of works (or at the beginning of a sentence).  See the disambiguation page [[Von Neumann]] — you will see that every article works that way. -->
[[File:Von Neumann Architecture.svg|thumb|upright=1.35|A von Neumann architecture scheme]]

The '''von Neumann architecture'''—also known as the '''von Neumann model''' or '''Princeton architecture'''—is a [[computer architecture]] based on the ''[[First Draft of a Report on the EDVAC]]'',<ref name ="FirstDraftReport" /> written by [[John von Neumann]] in 1945, describing designs discussed with [[John Mauchly]] and [[J. Presper Eckert]] at the University of Pennsylvania's [[Moore School of Electrical Engineering]]. The document describes a design architecture for an electronic [[digital computer]] made of "organs" that were later understood to have these components:
* A [[Central processing unit|processing unit]] with both an [[arithmetic logic unit]] and [[processor register]]s
* A [[control unit]] that includes an [[instruction register]] and a [[program counter]]
* [[Computer memory|Memory]] that stores [[Data (computing)|data]] and [[Instruction set|instructions]]
* External [[mass storage]]
* [[Input and output]] mechanisms<ref name="FirstDraftReport">{{Citation |author-last=von Neumann |author-first=John |author-link=John von Neumann |title=First Draft of a Report on the EDVAC |date=1945 |url=https://sites.google.com/site/michaeldgodfrey/vonneumann/vnedvac.pdf |access-date=2011-08-24 |archive-url=https://web.archive.org/web/20130314123032/http://qss.stanford.edu/~godfrey/vonNeumann/vnedvac.pdf |archive-date=2013-03-14}}.</ref><ref name="GanesanCh4">{{Harvnb|Ganesan|2009}}.</ref>

The attribution of the invention of the architecture to von Neumann is controversial, not least because Eckert and Mauchly had done a lot of the required design work and claim to have had the idea for stored programs long before discussing the ideas with von Neumann and [[Herman Goldstine]].<ref name="FiftyYearsOfArmyComputing">{{Citation |author-last=Bergin |author-first=Thomas J. |title=Fifty Years of Army Computing: From ENIAC to MSRC, U.S. Army Research Laboratory |date=2000 |page=34 |url=https://www.govinfo.gov/app/details/GOVPUB-D105-PURL-LPS58495 |access-date=2024-11-05}}</ref>

The term "von Neumann architecture" has evolved to refer to any [[stored-program computer]] in which an [[instruction fetch]] and a data operation cannot occur at the same time (since they share a common [[Bus (computing)|bus]]). This is referred to as the [[#von Neumann bottleneck|von Neumann bottleneck]], which often limits the performance of the corresponding system.<ref>{{Citation |author-last=Markgraf |author-first=Joey D. |title=The Von Neumann Bottleneck |date=2007 |url=http://aws.linnbenton.edu/cs271c/markgrj/ |archive-url=https://web.archive.org/web/20131212205159/http://aws.linnbenton.edu/cs271c/markgrj/ |archive-date=December 12, 2013 |url-status=dead |df=mdy-all }}.</ref>

The von Neumann architecture is simpler than the [[Harvard architecture]] (which has one dedicated set of address and data buses for reading and writing to memory and another set of address and data buses to fetch [[instruction fetch|instructions]]).

A [[stored-program computer]] uses the same underlying mechanism to encode both [[Computer program|program instructions]] and data as opposed to designs which use a mechanism such as discrete [[plugboard]] wiring or fixed control circuitry for instruction [[implementation]]. Stored-program computers were an advancement over the manually reconfigured or fixed function computers of the 1940s, such as the [[Colossus computer|Colossus]] and the [[ENIAC]]. These were programmed by setting [[switch]]es and inserting [[patch cable]]s to route data and control signals between various functional units.

The vast majority of modern computers use the same hardware mechanism to encode and store both data and program instructions, but have [[CPU cache|caches]] between the CPU and memory, and, for the caches closest to the CPU, have separate caches for instructions and data, so that most instruction and data fetches use separate buses ([[Modified Harvard architecture#Split-cache (or almost-von-Neumann) architecture|split-cache architecture]]).