Editing Wafer testing (section)

{{Short description|Tests performed immediately after semiconductor wafer fabrication}}

'''Wafer testing''' is a step performed during [[Fabrication (semiconductor)|semiconductor device fabrication]] after [[back end of line|back end of line (BEOL)]] and before [[IC packaging]]. 

Two types of testing are typically done. Very basic wafer parametric tests (WPT) are performed at a few locations on each wafer to ensure the wafer fabrication process has been carried out successfully.  Discrete test structures are provided for WPT to test parameters like transistor threshold voltage or gain, interconnect resistance, capacitance, diodes, etc. Considerable information about device performance is obtained from WPT using structured typically provided in the scribe lines.{{what|date=December 2024}}<ref>
[http://www.eetasia.com/ART_8800419948_480100_NT_648c3def.HTM "Startup enables IC variability characterization"]
by Richard Goering 2006</ref><ref>
[http://www2.computer.org/portal/web/csdl/doi/10.1109/ATS.2008.68 "Testing LCD Source Driver IC with Built-on-Scribe-Line Test Circuitry"] (abstract)
</ref><ref>''Design for Manufacturability And Statistical Design: A Constructive Approach'',
by Michael Orshansky, Sani Nassif, Duane Boning 2007.
{{ISBN|0-387-30928-4}} 
{{ISBN|978-0-387-30928-6}}
[https://books.google.com/books?id=sZ-NPuM-ScYC&dq=scribe+line+test+structures&pg=PA84]
p. 84</ref>
 
After WPT, all individual [[integrated circuits]] on the wafer are given extensive wafer functional testing (WFT) (also called die sort) by applying special [[Automatic test pattern generation|test patterns]].  The testers used for WFT are typically quite expensive (see [[Teradyne]] for an example of a semiconductor test system). The WFT "yield" is recognized as the key test in determining the economic outcome of the entire fabrication process.