Editing ASCI Red (section)

== System structure ==

The ASCI Red supercomputer was a distributed memory [[Multiple instruction, multiple data|MIMD]] (Multiple Instruction, Multiple Data) message-passing computer.  The design provided a high degree of scalability for I/O, memory, compute nodes, storage capacity, and communications; standard parallel interfaces also made it possible to port parallel applications to the machine.  The machine was structured into four partitions: Compute, Service, I/O, and System.  Parallel applications executed in the Compute Partition which contained nodes optimized for floating point performance.  The compute nodes had only the features required for efficient computation – they were not purposed for general interactive services.  The Service Partition provided an integrated, scalable host that supported interactive users (login sessions), application development, and system administration. The I/O Partition supported disk I/O, a scalable parallel file system and network services. The System Partition supported initial booting and system Reliability, Availability, and Serviceability (RAS) capabilities.<ref name="cug.org"/>

The Service partition helps integrate all of the different parts of ASCI Red together. It provides a scalable host for users, and it is used for general system administration.<ref name="ASCI"/> The I/O Partition provides a file system and network services, and the Service partition is made up of the log-in screens, tools for application development, and utilities for network connections.<ref name="Sandia"/> The Compute partition contains nodes that are designed for floating point performance. This is where the actual computing takes place.<ref name="Sandia"/> Every one of the compute nodes accommodated two 200&nbsp;MHz [[Pentium Pro|Pentium Pro processors]], each with a 16 KB [[CPU cache|level-1 cache]] and a 256 KB [[CPU cache|level-2 cache]], which were upgraded later to two 333&nbsp;MHz [[Pentium OverDrive#Socket 8|Pentium II OverDrive processors]], each with a 32 KB [[CPU cache|level-1 cache]] and a 512 KB [[CPU cache|level-2 cache]].<ref>{{cite web | url=http://www.top500.org/featured/systems/asci-red-sandia-national-laboratory/ | title=TOP500.org feature page on the ASCI Red of the Sandia National Laboratory | access-date=2016-01-08 | archive-date=January 9, 2016 | archive-url=https://web.archive.org/web/20160109013948/http://www.top500.org/featured/systems/asci-red-sandia-national-laboratory/ | url-status=dead }}</ref> According to [[Intel]], the ASCI Red Computer is also the first large scale supercomputer to be built entirely of common commercially available components.<ref name="tree">{{cite journal|last=Warren|first=Michael|title=Pentium Pro Inside: I. A Treecode at 430 Gigaflops on ASCI Red, II. Price/Performance of $50/Mflop on Loki and Hyglac|pages=61|journal=Proceedings of the ACM/IEEE Conference|publisher=IEEE|doi=10.1109/SC.1997.10057|date=November 1997|s2cid=13167835 }}</ref>

All of ASCI Red's partitions are interconnected to form one supercomputer, however at the same time none of the nodes support [[shared memory (interprocess communication)#In hardware|global shared memory]]. Each of the nodes works in its own memory, and each shares data with the others through "explicit message-passing".<ref name="Brightwell">{{cite book 
 | doi = 10.1109/CLUSTR.2003.1253322
 | isbn = 0-7695-2066-9
| chapter = A performance comparison of Linux and a lightweight kernel
| title = Proceedings IEEE International Conference on Cluster Computing CLUSTR-03
| pages = 251–258
| year = 2003
| last1 = Brightwell
| last2 = Riesen
| last3 = Underwood
| last4 = Hudson
| last5 = Bridges
| last6 = MacCabe
| s2cid = 7454194
}}</ref>