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==Implementation== <!-- [[Jump instruction]] redirects here. --> Branch instructions can alter the contents of the [[CPU]]'s [[program counter]] (PC) (or instruction pointer on Intel microprocessors). The program counter maintains the memory address of the next machine instruction to be fetched and executed. Therefore, a branch, if executed, causes the CPU to execute code from a new memory address, changing the program logic according to the algorithm planned by the programmer. One type of machine level branch is the '''jump instruction'''. These may or may not result in the PC being loaded or modified with some new, different value other than what it ordinarily would have been (being incremented past the current instruction to point to the following, next instruction). Jumps typically have ''unconditional'' and ''conditional'' forms where the latter may be ''taken'' or ''not taken'' (the PC is modified or not) depending on some condition. The second type of machine level branch is the '''call instruction''' which is used to implement [[subroutine]]s. Like jump instructions, calls may or may not modify the PC according to condition codes, however, additionally a '''return address''' is saved in a secure place in memory (usually in a memory resident data structure called a [[Stack (abstract data type)#Hardware stack|'''stack''']]). Upon completion of the subroutine, this return address is restored to the PC, and so program execution resumes with the instruction following the call instruction. The third type of machine level branch is the '''return instruction'''. This "pops" a return address off the stack and loads it into the PC register, thus returning control to the calling routine. Return instructions may also be conditionally executed. This description pertains to ordinary practice; however, the machine programmer has considerable powers to manipulate the return address on the stack, and so redirect program execution in any number of different ways. Depending on the processor, jump and call instructions may alter the contents of the PC register in different ways. An absolute address may be loaded, or the current contents of the PC may have some value (or displacement) added or subtracted from its current value, making the destination address relative to the current place in the program. The source of the displacement value may vary, such as an immediate value embedded within the instruction, or the contents of a processor register or memory location, or the contents of some location added to an index value. The term ''branch'' can also be used when referring to programs in [[high-level programming language]]s. In these branches usually take the form of [[Conditional (programming)|conditional statement]]s of various forms that encapsulate the instruction sequence that will be executed if the conditions are satisfied. Unconditional branch instructions such as [[GOTO]] are used to unconditionally jump to a different instruction sequence. If the algorithm requires a conditional branch, the GOTO (or GOSUB subroutine call) is preceded by an [[Conditional (computer programming)#If–then(–else)|IF-THEN]] statement specifying the condition(s). All high level languages support algorithms that can re-use code as a [[Control flow#Loops|loop]], a control structure that repeats a sequence of instructions until some condition is satisfied that causes the loop to terminate. Loops also qualify as branch instructions. At the machine level, loops are implemented as ordinary conditional jumps that redirect execution to repeating code. In CPUs with [[flag register]]s, an earlier instruction sets a condition in the flag register. The earlier instruction may be [[Arithmetic logic unit|arithmetic, or a logic]] instruction. It is often close to the branch, though not necessarily the instruction ''immediately'' before the branch. The stored condition is then used in a branch such as ''jump if overflow-flag set''. This temporary information is often stored in a flag register but may also be located elsewhere. A flag register design is simple in slower, simple computers. In fast computers a flag register can place a bottleneck on speed, because instructions that could otherwise operate in parallel (in several [[execution unit]]s) need to set the flag bits in a particular sequence. There are also machines (or particular instructions) where the condition may be checked by the jump instruction itself, such as ''branch <label> if register X negative''. In simple computer designs, comparison branches execute more arithmetic and can use more power than flag register branches. In fast computer designs comparison branches can run faster than flag register branches, because comparison branches can access the registers with more parallelism, using the same CPU mechanisms as a calculation. Some early and simple CPU architectures, still found in microcontrollers, may not implement a conditional jump, but rather only a conditional "skip the next instruction" operation. A conditional jump or call is thus implemented as a conditional skip of an unconditional jump or call instruction. ===Examples=== Depending on the [[computer architecture]], the [[assembly language]] [[mnemonic]] for a jump instruction is typically some shortened form of the word ''jump'' or the word ''branch'', often along with other informative letters (or an extra parameter) representing the condition. Sometimes other details are included as well, such as the range of the jump (the offset size) or a special addressing mode that should be used to locate the actual effective offset. This table lists the machine level branch or jump instructions found in several well-known architectures: {| class="wikitable" ! scope="col" | condition or result ! scope="col" | x86 ! scope="col" | PDP-11, VAX ! scope="col" | ARM (partly 6502) ! scope="col" | equation |- | zero (implies equal for sub/cmp) | JZ; JNZ | BEQ; BNE | BEQ; BNE | zero; not zero |- | negative (N), sign (S), or minus (M) | JS; JNS | BMI; BPL | BMI; BPL | negative; not negative |- | arithmetic overflow (flag called O or V) | JO; JNO | BVS; BVC | BVS; BVC | overflow; not overflow |- | carry (from add, cmp, shift, etc.) | JC; JNC | BCS; BCC | BCS; BCC | carry; not carry |- | ''unsigned'' below (lower) | JB | BLO | BLO <sup>*</sup> | borrow |- | ''unsigned'' below or equal (lower or same) | JBE | BLOS | BLS <sup>*</sup> | borrow or zero |- | ''unsigned'' above or equal (higher or same) | JAE | BHIS | BHS <sup>*</sup> | not borrow |- | ''unsigned'' above (higher) | JA | BHI | BHI <sup>*</sup> | not borrow and not zero |- | ''signed'' less than | JL | BLT | BLT | sign≠overflow |- | ''signed'' less or equal | JLE | BLE | BLE | (sign≠overflow) or zero |- | ''signed'' greater or equal | JGE | BGE | BGE | sign=overflow |- | ''signed'' greater than | JG | BGT | BGT | (sign=overflow) and not zero |} <sup>*</sup> x86, the PDP-11, VAX, and some others, set the carry-flag to signal ''borrow'' and clear the carry-flag to signal ''no borrow''. ARM, [[6502]], the PIC, and some others, do the opposite for subtractive operations. This inverted function of the carry flag for certain instructions is marked by (<sup>*</sup>), that is, '''borrow=<u>not</u> carry''' in some parts of the table, but if not otherwise noted, borrow≡carry. However, carry on additive operations are handled the same way by most architectures.
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