Editing Cell (processor) (section)

==History==
[[Image:CELL BE processor PS3 board.jpg|thumb|Cell BE as it appears in the PS3 on the motherboard]]
[[File:Peter portrait.jpg|thumb|[[Peter Hofstee]], one of the chief architects of the Cell microprocessor]]
[[File:Michael Gschwind.jpg|thumb|Michael Gschwind, one of the chief architects of the Cell microprocessor]]In mid-2000, Sony, Toshiba, and IBM formed the STI alliance to develop a new microprocessor.<ref>Krewell, Kevin (February 14, 2005). "Cell Moves Into the Limelight". ''[[Microprocessor Report]]''.</ref> The STI Design Center opened in March 2001 in [[Austin, Texas]]. Over the next four years, more than 400 engineers collaborated on the project, with IBM contributing from eleven of its design centers.<ref name="kahle">{{Cite news |date=August 7, 2005 |title=Introduction to the Cell multiprocessor |url=http://researchweb.watson.ibm.com/journal/rd/494/kahle.html |url-status=dead |archive-url=https://web.archive.org/web/20070228043339/http://researchweb.watson.ibm.com/journal/rd/494/kahle.html |archive-date=February 28, 2007 |access-date=March 22, 2007 |publisher=IBM Journal of Research and Development}}</ref>

Initial [[patents]] described a configuration with four [[Power Processing Element]]s (PPEs), each paired with eight Synergistic Processing Elements (SPEs), for a theoretical peak performance of 1 teraFLOPS.{{Citation needed|date=April 2025}} However, only a scaled-down design—one PPE with eight SPEs—was ultimately manufactured.<ref name="xbit-65">{{Cite web |title=IBM Produces Cell Processor Using New Fabrication Technology. |url=http://www.xbitlabs.com/news/cpu/display/20070312121941.html |url-status=dead |archive-url=https://web.archive.org/web/20070315000722/http://www.xbitlabs.com/news/cpu/display/20070312121941.html |archive-date=March 15, 2007 |access-date=March 12, 2007 |publisher=X-bit labs}}</ref>

Fabrication of the initial Cell chip began on a [[90 nm process|90&nbsp;nm]] SOI ([[silicon on insulator]]) process.<ref name="xbit-65" /> In March 2007, IBM transitioned production to a [[65 nm process|65&nbsp;nm process]],<ref name="xbit-65" /><ref>{{Cite news |date=January 30, 2007 |title=65nm CELL processor production started |url=http://www.psu.com/node/7409 |url-status=dead |archive-url=https://web.archive.org/web/20070202024328/http://www.psu.com/node/7409 |archive-date=February 2, 2007 |access-date=May 18, 2007 |publisher=PlayStation Universe}}</ref> followed by a [[45 nm process|45&nbsp;nm process]] announced in February 2008.<ref name="ArsTechnicaInterview">{{Cite web |date=August 18, 2009 |title=Sony answears our questions about the new PlayStation 3 |url=https://arstechnica.com/gaming/news/2009/08/sony-answers-our-questions-about-the-new-playstation-3.ars |access-date=August 19, 2009 |website=[[Ars Technica]]}}</ref> [[Bandai Namco Entertainment]] used the Cell processor in its [[Namco System 357]] and 369 arcade boards.{{Citation needed|date=April 2025}}

In May 2008, IBM introduced the [[PowerXCell 8i]], a double-precision variant of the Cell processor, used in systems such as IBM's Roadrunner supercomputer, the first to achieve one petaFLOPS and the fastest until late 2009.<ref name="Gaudin 2008">{{Cite news |last=Gaudin |first=Sharon |date=June 9, 2008 |title=IBM's Roadrunner smashes 4-minute mile of supercomputing |url=http://www.computerworld.com/action/article.do?command=viewArticleBasic&taxonomyName=hardware&articleId=9095318&taxonomyId=12&intsrc=kc_top |url-status=dead |archive-url=https://web.archive.org/web/20081224001155/http://www.computerworld.com/action/article.do?command=viewArticleBasic&taxonomyName=hardware&articleId=9095318&taxonomyId=12&intsrc=kc_top |archive-date=December 24, 2008 |access-date=June 10, 2008 |work=Computerworld}}</ref><ref name="Fildes 2008">{{Cite news |last=Fildes |first=Jonathan |date=June 9, 2008 |title=Supercomputer sets petaflop pace |url=http://news.bbc.co.uk/2/hi/technology/7443557.stm |access-date=June 9, 2008 |work=BBC News}}</ref>

IBM ceased development of higher-core-count Cell variants (such as a 32-APU version) in late 2009,<ref name="HPCwire">{{Cite web |date=October 27, 2009 |title=Will Roadrunner Be the Cell's Last Hurrah? |url=http://www.hpcwire.com/features/Will-Roadrunner-Be-the-Cells-Last-Hurrah-66707892.html |url-status=dead |archive-url=https://web.archive.org/web/20091031112643/http://www.hpcwire.com/features/Will-Roadrunner-Be-the-Cells-Last-Hurrah-66707892.html |archive-date=October 31, 2009}}</ref><ref name="HeiseOnline">{{Cite web |date=November 20, 2009 |title=SC09: IBM lässt Cell-Prozessor auslaufen |url=http://www.heise.de/newsticker/meldung/SC09-IBM-laesst-Cell-Prozessor-auslaufen-864497.html |access-date=November 21, 2009 |publisher=[[HeiseOnline]]}}</ref> but continued supporting existing Cell-based products.<ref name="DriverHeaven">{{Cite web |date=November 23, 2009 |title=IBM have not stopped Cell processor development |url=http://www.driverheaven.net/news.php?newsid=344 |url-status=dead |archive-url=https://web.archive.org/web/20091125175635/http://www.driverheaven.net/news.php?newsid=344 |archive-date=November 25, 2009 |access-date=November 24, 2009 |publisher=DriverHeaven.net}}</ref>

===Commercialization===
On May 17, 2005, Sony confirmed the Cell configuration used in the [[PlayStation 3]]: one PPE and seven SPEs.<ref name="CELLSpecs">{{Cite web |title=Cell Introduction |url=https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/D21E662845B95D4F872570AB0055404D/$file/2053_IBM_CellIntro.pdf |url-status=dead |archive-url=https://web.archive.org/web/20090326055101/http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/D21E662845B95D4F872570AB0055404D/$file/2053_IBM_CellIntro.pdf |archive-date=March 26, 2009 |access-date=January 14, 2008 |publisher=IBM}}</ref><ref name="e3ign">{{Cite web |last=Roper |first=Chris |date=May 17, 2005 |title=E3 2005: Cell Processor Technology Demos |url=http://gear.ign.com/articles/615/615521p1.html |access-date=March 22, 2007 |website=IGN}}</ref><ref>{{Cite news |last=Becker |first=David |date=February 7, 2005 |title=PlayStation 3 chip has split personality |url=http://news.cnet.com/PlayStation+3+chip+has+split+personality/2100-1043_3-5566340.html?tag=nl |access-date=May 18, 2007 |work=[[CNET]]}}</ref> To improve manufacturing [[Semiconductor device fabrication#Device test|yield]], the processor is initially fabricated with eight SPEs. After production, [[Wafer testing|each chip is tested]], and if a defect is found in one SPE, it is disabled using [[laser trimming]]. This approach minimizes waste by utilizing processors that would otherwise be discarded. Even in chips without defects, one SPE is intentionally disabled to ensure consistency across units.<ref>{{Cite web |title=Sony PlayStation 3 Cell Processor |url=http://moss.csc.ncsu.edu/~mueller/cluster/ps3/ |url-status=live |archive-url=https://web.archive.org/web/20071204202236/http://moss.csc.ncsu.edu/~mueller/cluster/ps3/ |archive-date=December 4, 2007 |access-date=January 14, 2008 |publisher=North Carolina State University}}</ref><ref name="GameDevelMag3">{{Cite news |last=Linklater |first=Martin |title=Optimizing Cell Code |work=Game Developer Magazine, April 2007 |pages=15–18 |quote=To increase fabrication yields, Sony ships PlayStation 3 Cell processors with only seven working SPEs. And from those seven, one SPE will be used by the operating system for various tasks, This leaves six SPEs for game programmer to use.}}</ref> Of the seven operational SPEs, six are available for developers to use in games and applications, while the seventh is reserved for the console's operating system.<ref name="GameDevelMag3" /> The chip operates at a clock speed of 3.2&nbsp;GHz.<ref name="e3witpro">{{Cite news |last=Thurrott |first=Paul |date=May 17, 2005 |title=Sony Ups the Ante with PlayStation 3 |url=http://www.windowsitpro.com/Articles/ArticleID/46431/46431.html?Ad=1 |url-status=dead |archive-url=https://web.archive.org/web/20070930155439/http://www.windowsitpro.com/Articles/ArticleID/46431/46431.html?Ad=1 |archive-date=September 30, 2007 |access-date=March 22, 2007 |publisher=WindowsITPro}}</ref> Sony also used the Cell in its [[Zego]] high-performance media computing server.

The PPE supports [[simultaneous multithreading]] (SMT) and can execute two threads, while each active SPE supports one thread. In the PlayStation 3 configuration, the Cell processor supports up to nine threads.{{Citation needed|date=April 2025}}

On June 28, 2005, IBM and Mercury Computer Systems announced a partnership to use Cell processors in [[embedded systems]] for [[medical imaging]], [[aerospace]], and [[seismic processing]], among other fields.<ref name="mcs">{{Cite news |date=April 12, 2007 |title=Mercury Wins IBM PartnerWorld Beacon Award |url=http://www.supercomputingonline.com/article.php?sid=13477 |access-date=May 18, 2007 |publisher=Supercomputing Online}}{{dead link|date=August 2017|bot=medic}}{{cbignore|bot=medic}}</ref> Mercury use the full Cell processor with eight active SPEs.{{Citation needed|date=April 2025}} Mercury later released [[blade server]]s and [[PCI Express]] accelerator cards based on the architecture.<ref name="gigaaccel180">{{Cite web |date=April 8, 2008 |title=Fixstars Releases Accelerator Board Featuring the PowerXCell 8i |url=http://www.fixstars.com/en/company/press/20080403.html |url-status=dead |archive-url=https://web.archive.org/web/20090105224210/http://www.fixstars.com/en/company/press/20080403.html |archive-date=January 5, 2009 |access-date=August 18, 2008 |publisher=Fixstars Corporation}}</ref>

In 2006, IBM introduced the QS20 blade server, offering up to 410&nbsp;gigaFLOPS per module in single-precision performance. The [[QS22]] blade, based on the PowerXCell 8i, was used in IBM's Roadrunner supercomputer.<ref name="Gaudin 2008" /><ref name="Fildes 2008" /> On April 8, 2008, Fixstars Corporation released a PCI Express accelerator board based on the PowerXCell 8i.<ref name="gigaaccel180" />