Editing Data General Nova (section)

==History==

===Edson de Castro and the PDP-X===
[[Edson de Castro]] was the Product Manager of the pioneering [[Digital Equipment Corporation]] (DEC) [[PDP-8]], a 12-bit computer widely referred to as the first true minicomputer.<ref>{{cite book |url=https://books.google.com/books?id=NrMkBQAAQBAJ&pg=PA165 |title=The Computing Universe: A Journey through a Revolution |first1=Tony |last1=Hey |first2=Anthony |last2=Hey |first3=Gyuri |last3=Pápay |date=2014 |page=165 |publisher=Cambridge University Press |isbn=9780521766456}}</ref> He also led the design of the upgraded PDP-8/I, which used early [[integrated circuit]]s in place of individual transistors.{{sfn|Hendrie|2002|p=40}}

During the PDP-8/I process, de Castro had been visiting [[printed circuit board|circuit board]] manufacturers who were making rapid advances in the complexity of the boards they could assemble. de Castro concluded that the 8/I could be produced using fully automated assembly on large boards, which would have been impossible only a year earlier. Others within DEC had become used to the smaller boards used in earlier machines and were concerned about tracking down problems when there were many components on a single board.{{efn|This was likely a reaction to the problems with the [[PDP-6]], which used large boards and had significant failure rates. The [[PDP-10]], essentially a re-engineered PDP-6, uses smaller "flip-chip" cards.}} For the 8/I, the decision was made to stay with small boards, using the new "[[Flip-Chip module|flip-chip]]" packaging for a modest improvement in density.{{sfn|Hendrie|2002|p=40}}

During the period when the PDP-8 was being developed, the introduction of [[ASCII]] and its major update in 1967 led to a new generation of designs with word lengths that were multiples of 8 bits rather than multiples of 6 bits as in most previous designs. This led to mid-range designs working at 16-bit word lengths instead of DEC's current 12- and 18-bit lineups. de Castro was convinced that it was possible to improve upon the PDP-8 by building a 16-bit minicomputer CPU on a single 15-inch square board.{{sfn|Supnik|2004}}{{sfn|Hendrie|2002|p=48}}

In 1967, de Castro began a new design effort known as "PDP-X" which included several advanced features. Among these was a single underlying design that could be used to build 8-, 16-, and 32-bit platforms.{{sfn|Hendrie|2002|p=42}} This progressed to the point of producing several detailed architecture documents. [[Ken Olsen]] was not supportive of this project, feeling it did not offer sufficient advantages over the 12-bit PDP-8 and the 18-bit [[PDP-9]]. It was eventually canceled in the spring of 1968.{{sfn|Supnik|2004}}

===Design===
Cancelation of the PDP-X prompted de Castro to consider leaving DEC to build a system on his own. He was not alone; in late 1967 a group of like-minded engineers formed to consider such a machine. The group included Pat Green, a divisional manager; Richard Sogge, another hardware engineer; and Henry Burkhardt III, a software engineer.<ref>{{cite web |url=http://www.cpushack.com/2014/11/21/when-a-minicomputer-becomes-a-micro-the-dgc-micronova-mn601-and-602/ |title=When a Minicomputer becomes a Micro: the DGC microNOVA mN601 and 602 |date=21 November 2014 |website=The CPU Shack Museum}}</ref> In contrast to the PDP-X, the new effort focused on a single machine that could be brought to market quickly, as de Castro felt the PDP-X concept was far too ambitious for a small [[startup company]].{{sfn|Hendrie|2002|p=43}}

Discussing it with the others at DEC, the initial concept led to an 8-bit machine which would be less costly to implement.{{sfn|Hendrie|2002|p=43-44}} The group began talking with Herbert Richman, a salesman for [[Fairchild Semiconductor]] who knew the others through his contacts with DEC. At the time, Fairchild was battling with [[Texas Instruments]] and [[Signetics]] in the rapidly growing [[transistor-transistor logic|TTL]] market and were introducing new [[semiconductor device fabrication|fabs]] that allowed more complex designs. Fairchild's latest 9300 series allowed up to 96 gates per chip, and they had used this to implement a number of 4-bit chips like binary counters and [[shift register]]s.<ref name="Gianluca G.">{{cite web |url=https://apollo181.wixsite.com/apollo181/about |title=History of ALU 74181 in commercial minicomputers |author=Gianluca G. |date=2017}}</ref>

Using these ICs reduced the total IC count needed to implement a complete [[arithmetic logic unit]] (ALU), the core mathematical component of a CPU, allowing the expansion from an 8-bit design to 16-bit. This did require the expansion of the CPU from a single {{convert|15|x|15|in|cm}} [[printed circuit board]] to two, but such a design would still be significantly cheaper to produce than the PDP-8/I while still being more powerful and ASCII-based. A third board held the [[input/output]] circuitry and a complete system typically included another board with 4&nbsp;kB of [[random-access memory]]. A complete four-card system fit in a single rackmount chassis.{{sfn|Hendrie|2002|p=48}}

The boards were designed so they could be connected together using a printed circuit [[backplane]], with minimal manual wiring, allowing all the boards to be built in an automated fashion. This greatly reduced costs over the PDP-8/I, which consisted of many smaller boards that had to be wired together at the backplane, which was itself connected together using [[wire wrap]]. The larger-board construction also made the Nova more reliable, which made it especially attractive for industrial or lab settings.{{sfn|Hendrie|2002|p=48}}

The new design used a simple [[load–store architecture]]{{sfn|Supnik|2004}} which would reemerge in the RISC designs in the 1980s. Because the complexity of a [[flip-flop (electronics)|flip-flop]] was being rapidly reduced as they were implemented in chips, the design offset the lack of [[addressing mode]]s of the load–store design by adding four general-purpose [[accumulator (computing)|accumulators]], instead of the single register that would be found in similar low-cost offerings like the PDP series.{{sfn|Supnik|2004}}

===Introduction===
Late in 1967, Richman introduced the group to New York-based lawyer Fred Adler, who began canvassing various funding sources for seed capital. By 1968, Adler had arranged a major funding deal with a consortium of [[venture capital]] funds from the Boston area, who agreed to provide an initial {{US$|400000}} investment with a second {{US$|400000}} available for production ramp-up. de Castro, Burkhart and Sogge quit DEC and started [[Data General]] (DG) on 15 April 1968. Green did not join them, considering the venture too risky, and Richman did not join until the product was up and running later in the year.{{sfn|Hendrie|2002|p=48}}

Work on the first system took about nine months, and the first sales efforts started that November. They had a bit of luck because the Fall [[Joint Computer Conference]] had been delayed until December that year, so they were able to bring a working unit to San Francisco where they ran a version of ''[[Spacewar!]]''.{{sfn|Hendrie|2002|p=49}} DG officially released the Nova in 1969 at a base price of {{US$|3995|1969|round=0}}, advertising it as "the best small computer in the world."<ref>{{cite web |url=http://s3data.computerhistory.org/brochures/dgc.nova.1968.102646102.pdf |archive-url=https://web.archive.org/web/20191211152934/http://s3data.computerhistory.org/brochures/dgc.nova.1968.102646102.pdf |archive-date=2019-12-11 |url-status=live |title=The best small computer in the world |date=November 1968}}</ref> The basic model was not very useful out of the box, and adding {{val|8|u=[[kiloword|kW]]}} ({{val|16|ul=kB}}) RAM in the form of [[core memory]] typically brought the price up to {{US$|7995}}.<ref name=thwart/> In contrast, a PDP-8/I with {{val|4|u=[[kiloword|kW]]}} ({{val|6|u=kB}}) was priced at {{US$|12800}}.<ref>{{cite web |url=http://homepage.divms.uiowa.edu/~jones/pdp8/models/#PDP8I |title=The Digital Equipment Corporation PDP-8 |first=Douglas |last=Jones |website=University Of Iowa Department of Computer Science}}</ref>

The first sale was to a university in Texas, with the team hand-building an example which shipped out in February. However, this was in the midst of a strike in the airline industry and the machine never arrived. They sent a second example, which arrived promptly as the strike had ended by that point, and in May the original one was finally delivered as well.{{sfn|Hendrie|2002|p=50}}

The system was successful from the start, with the 100th being sold after six months,<ref name=supernova/> and the 500th after 15 months.<ref name=thwart>{{cite web |url=https://www.computerhistory.org/revolution/minicomputers/11/338 |title=Thwarted at DEC, Thriving at Data General |website=Computer History Museum}}</ref> Sales accelerated as newer versions were introduced, and by 1975 the company had annual sales of {{US$|100 million}}.<ref name=cnnmoney>{{cite web |title=The Business That Time Forgot: Data General is gone. But does that make its founder a failure? |date=1 April 2003 |url=https://money.cnn.com/magazines/fsb/fsb_archive/2003/04/01/341000/ |website=money.cnn.com |access-date=27 July 2016}}</ref>

===SuperNOVA===
Ken Olsen had publicly predicted that DG would fail, but with the release of the Nova it was clear that was not going to happen. By this time, a number of other companies were talking about introducing 16-bit designs as well. Olsen decided these presented a threat to their 18-bit line as well as 12-bit, and began a new 16-bit design effort.{{sfn|Hendrie|2002|p=53}} This emerged in 1970 as the [[PDP-11]], a much more complex design that was as different from the PDP-X as the Nova was. The two designs competed heavily in the market.{{sfn|Supnik|2004}}

Rumors of the new system from DEC reached DG shortly after the Nova began shipping. In spring 1970 they hired a new designer, Larry Seligman, to leapfrog any possible machine in the making. Two major changes had taken place since the Nova was designed; one was that [[Signetics]] had introduced the 8260, a 4-bit IC that combined an adder, XNOR and AND, meaning the number of chips needed to implement the basic logic was reduced by about three times. Another was that [[Intel]] was aggressively talking up semiconductor-based memories, promising 1024 bits on a single chip and running at much higher speeds than core memory.{{sfn|Hendrie|2002|p=53}}

Seligman's new design took advantage of both of these improvements. To start, the new ICs allowed the ALU to be expanded to full 16-bit width on the same two cards, allowing it to carry out math and logic operations in a single cycle and thereby making the new design four times as fast as the original. In addition, new smaller core memory was used that improved the cycle time from the original's 1,200&nbsp;ns to 800&nbsp;ns, offering a further {{sfrac|3}} improvement. Performance could be further improved by replacing the core with [[read-only memory]]; lacking core's read–write cycle, this could be accessed in 300&nbsp;ns for a dramatic performance boost.<ref name=supernova>{{cite web |url=http://s3data.computerhistory.org/brochures/datageneral.novasupernova.1970.102646153.pdf |archive-url=https://web.archive.org/web/20191211155612/http://s3data.computerhistory.org/brochures/datageneral.novasupernova.1970.102646153.pdf |archive-date=2019-12-11 |url-status=live |website=Computer History Museum |title=SUPER NOVA |date=1970}}</ref>

The resulting machine, known as the '''SuperNOVA''', was released in 1970. Although the initial models still used core, the entire design was based on the premise that faster semiconductor memories would become available and the platform could make full use of them. This was introduced later the same year as the '''SuperNOVA SC''', featuring semiconductor (SC) memory. The much higher performance memory allowed the CPU, which was synchronous with memory, to be further increased in speed to run at a 300&nbsp;ns cycle time (3.3&nbsp;MHz). This made it the fastest available minicomputer for many years.<ref>{{cite web |website=Clemson University |title=Data General History / Background |url=https://people.cs.clemson.edu/~mark/330/eagle.html}}</ref> Initially the new memory was also very expensive and ran hot, so it was not widely used.{{sfn|Hendrie|2002|p=54}}

===1200 and 800===
[[File:Data General Nova 1200 CPU.agr.jpg|thumb|right|Nova 1200 CPU [[printed circuit board]]. The 74181 ALU is the large IC center-right.]]

As a demonstration of the power of their Micromatrix [[gate array]] technology, in 1968 Fairchild prototyped the 4711, a single-chip 4-bit ALU.<ref name="Gianluca G." />{{sfn|Hendrie|2002|p=44}} The design was never intended for mass production and was quite expensive to produce. The introduction of the Signetics 8260 in 1969 forced their hand; both Texas Instruments and Fairchild introduced 4-bit ALUs of their own in 1970, the [[74181]] and 9341, respectively. In contrast to the 8260, the new designs offered all common logic functions and further reduced the chip count.<ref name="Gianluca G." />

This led DG to consider the design of a new CPU using these more integrated ICs. At a minimum, this would reduce the CPU to a single card for either the basic Nova or the SuperNOVA. A new concept emerged where a single chassis would be able to host either machine simply by swapping out the CPU circuit board. This would allow customers to purchase the lower-cost system and then upgrade at any time.{{sfn|Hendrie|2002|p=55}}

While Seligman was working on the SuperNOVA, the company received a letter from Ron Gruner stating "I've read about your product, I've read your ads, and I'm going to work for you. And I'm going to be at your offices in a week to talk to you about that."{{sfn|Hendrie|2002|p=55}} He was hired on the spot. Gruner was put in charge of the low-cost machine while Seligman designed a matching high-performance version.{{sfn|Hendrie|2002|p=55}}

Gruner's low-cost model launched in 1970 as the '''Nova 1200''', the 1200 referring to the use of the original Nova's 1,200&nbsp;ns core memory. It featured a 4-bit ALU based on a single 74181 chip, and was thus essentially a repackaged Nova. Seligman's repackaged four-ALU SuperNOVA was released in 1971 as the '''Nova 800''', resulting in the somewhat confusing naming where the lower-numbered model has higher performance.{{sfn|Hendrie|2002|p=55}} Both models were offered in a variety of cases, the 1200 with seven slots, the 1210 with four and the 1220 with fourteen.

===Later models===
By this time, the PDP-11 was finally shipping. It offered a much richer [[instruction set architecture]] than the deliberately simple one in the Nova. Continuing improvement in IC designs, and especially their [[price–performance ratio]], was eroding the value of the original simplified instructions. Seligman was put in charge of designing a new machine that would be compatible with the Nova while offering a much richer environment for those who wanted it. This concept shipped as the [[Data General Eclipse]] series, which offered the ability to add additional circuitry to tailor the instruction set for scientific or data processing workloads. The Eclipse was successful in competing with the PDP-11 at the higher end of the market.{{sfn|Hendrie|2002|p=58}}

Around the same time, rumors of a new 32-bit machine from DEC began to surface. DG decided they had to have a similar product, and Gruner was put in charge of what became the Fountainhead Project. Given the scope of the project, they agreed that the entire effort should be handled off-site, and Gruner selected a location at [[Research Triangle Park]] in [[North Carolina]]. This design became very complex{{sfn|Hendrie|2002|p=60}} and was ultimately canceled years later.

While these efforts were underway, work on the Nova line continued.

====840====
The 840, first offered in 1973, also included a new paged memory system allowing for addresses of up to 17-bits. An index offset the base address into the larger 128&nbsp;kword memory. Actually installing this much memory required considerable space; the 840 shipped in a large 14-slot case.

====Nova 2====
The next version was the '''Nova 2''', with the first versions shipping in 1973. The Nova 2 was essentially a simplified version of the earlier machines as increasing chip densities allowed the CPU to be reduced in size. While the SuperNOVA used three 15×15" boards to implement the CPU and its memory, the Nova 2 fitted all of this onto a single board. ROM was used to store the boot code, which was then copied into core when the "program load" switch was flipped. Versions were available with four ("2/4"), seven and ten ("2/10") slots.

====Nova 3====
[[File:Dg-nova3.jpg|thumb|right|Data General Nova 3]]
The '''Nova 3''' of 1975 added two more registers, used to control access to a built-in stack. The processor was also re-implemented using [[Transistor–transistor logic|TTL]] components, further increasing the performance of the system. The Nova 3 was offered in four-slot (the Nova 3/4) and twelve-slot (the Nova 3/12) versions.

====Nova 4====
It appears that Data General originally intended the Nova 3 to be the last of its line, planning to replace the Nova with the later Eclipse machines.{{citation needed|date=March 2024}} However, continued demand led to a '''Nova 4''' machine introduced in 1978, this time based on four [[AMD Am2901]] [[bit-slice]] [[arithmetic logic unit|ALUs]]. This machine was designed from the start to be both the Nova 4 and the Eclipse S/140, with different [[microcode]] for each. A floating-point co-processor was also available, taking up a separate slot. An additional option allowed for memory mapping, allowing programs to access up to 128&nbsp;kwords of memory using [[bank switching]]. Unlike the earlier machines, the Nova 4 did not include a [[front panel|front panel console]] and instead included a ROM containing machine code that allows a [[computer terminal|terminal]] to emulate a console when needed.<ref name="nova-4-fe-manual">{{cite book|url=http://www.bitsavers.org/pdf/dg/Nova_4/015-000095-02_Nova_4_Field_Engineering_Reference.pdf|title=Nova 4/S and 4/X|series=Field Engineer's Reference Series|date=June 1981|publisher=[[Data General]]}}</ref>{{rp|page=87}}

There were three different versions of the Nova 4, the Nova 4/C, the Nova 4/S and the Nova 4/X. The Nova 4/C was a single-board implementation that included all of the memory (16 or 32&nbsp;kwords). The Nova 4/S and 4/X used separate memory boards. The Nova 4/X had the on-board [[memory management unit]] (MMU) enabled to allow up to 128&nbsp;kwords of memory to be used. The MMU was also installed in the Nova 4/S, but was disabled by firmware. Both the 4/S and the 4/X included a "prefetcher" to increase performance by fetching up to 11 instructions from memory before they were needed.<ref name="nova-4-fe-manual" />{{rp|page=5}}

===microNOVA===
[[File:Data General mN601G 1.jpg|thumb|Data General ''mN601'' microprocessor]]
{{See also|Fairchild 9440#microNOVA}}
Data General also produced a series of '''microNOVA''' single-chip implementations of the Nova processor. To allow it to fit into a 40-pin [[dual in-line package]] (DIP) chip, the [[address bus]] and [[data bus]] shared a set of 16 pins. This meant that reads and writes to memory required two cycles, and that the machine ran about half the speed of the original Nova as a result.<ref name=micro>{{cite book |title=microNOVA |publisher=Data General |date=1977}}</ref>

The first chip in the series was the '''mN601''', of 1977. This was sold both as a CPU for other users, a complete chipset for those wanting to implement a computer, a complete computer on a single board with 4&nbsp;kB of RAM, and as a complete low-end model of the Nova.<ref name=micro/> An upgraded version of the design, 1979's '''mN602''', reduced the entire chipset to a single [[VLSI]]. This was offered in two machines, the '''microNOVA MP/100''' and larger '''microNOVA MP/200'''.

The microNOVA was later re-packaged with a monitor in a PC-style case with two [[floppy disk]]s as the '''Enterprise'''. Enterprise shipped in 1981, running [[Data General RDOS|RDOS]], but the introduction of the [[IBM PC]] the same year made most other machines disappear under the radar.<ref>{{cite magazine |magazine=Personal Computer World |title=Enterprise - a 16 bit business computer for only £2300 |date=October 1983 |url=https://nosher.net/archives/computers/pcw_1983-10-00_010_datagen}}</ref>

===Legacy===
The Nova influenced the design of both the [[Xerox Alto]] (1973)<ref>{{cite web |url=http://www.bitsavers.org/pdf/xerox/alto/memos_1974/Alto_A_Personal_Computer_Dec74.pdf |archive-url=https://web.archive.org/web/20110606164257/http://www.bitsavers.org/pdf/xerox/alto/memos_1974/Alto_A_Personal_Computer_Dec74.pdf |archive-date=2011-06-06 |url-status=live |title=Alto: A Personal Computer System |author1=Charles P. Thacker |author2=Edward M. McCreight |page=13 |date=December 1974}}</ref> and [[Apple I]] (1976)<ref>{{cite book |title=Apple I Replica Creation: Back to the Garage |author=Tom Owad |page=xxi |isbn=1-931836-40-X |date=2005}}</ref> computers, and its architecture was the basis for the [[Computervision]] CGP (Computervision Graphics Processor) series. Its external design has been reported to be the direct inspiration for the front panel of the [[Altair 8800|MITS Altair]] (1975) microcomputer.

Data General followed up on the success of the original Nova with a series of faster designs. The Eclipse family of systems was later introduced with an extended upwardly compatible instruction set, and the MV-series further extended the Eclipse into a 32-bit architecture to compete with the DEC [[VAX]]. The development of the MV-series was documented in [[Tracy Kidder]]'s popular 1981 book, ''[[The Soul of a New Machine]]''. Data General itself would later evolve into a vendor of Intel processor-based servers and storage arrays, eventually being purchased by [[Dell EMC|EMC]].

There is a diverse but ardent group of people worldwide who restore and preserve original 16-bit Data General systems.<ref>{{cite web |title=Data General Restoration |url=https://www.datageneral.uk/ |access-date=2021-08-20 |website=Data General Nova, Eclipse, MV and AV |language=en-GB}}</ref><ref>{{cite web |title=The Big & Beautiful Data General Minicomputers |url=http://www.chookfest.net/nova3/ |access-date=2021-08-20 |website=www.chookfest.net}}</ref>