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Fat tree
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==Applications in supercomputers== Supercomputers that use a fat tree network<ref>{{cite book |author-link=Yuefan Deng |author=Yuefan Deng |title=Applied Parallel Computing |chapter=3.2.1 Hardware systems: Network Interconnections: Topology |chapter-url=https://books.google.com/books?id=YS9wvVeWrXgC&pg=PA25 |year=2013 |publisher=World Scientific |isbn=978-981-4307-60-4 |pages=25}}</ref> include the two fastest as of late 2018,<ref>{{cite web|url=https://www.top500.org/lists/2018/11/|title=November 2018 TOP500|date=November 2018|access-date=2019-02-11|publisher=[[TOP500]]}}</ref> [[Summit (supercomputer)|Summit]]<ref>{{cite web|url=https://www.olcf.ornl.gov/olcf-resources/compute-systems/summit|title=Summit - Oak Ridge National Laboratory's next High Performance Supercomputer|access-date=2019-02-11|publisher=[[Oak Ridge Leadership Computing Facility]]}}</ref> and [[Sierra (supercomputer)|Sierra]],<ref>{{cite web|url=https://computing.llnl.gov/tutorials/sierra/#Mellanox|title=Using LC's Sierra Systems - Hardware - Mellanox EDR InfiniBand Network - Topology and LC Sierra Configuration|date=2019-01-18|access-date=2019-02-11|last=Barney|first=Blaise|publisher=[[Lawrence Livermore National Laboratory]]}}</ref> as well as [[Tianhe-2]],<ref>{{cite web|url=http://www.netlib.org/utk/people/JackDongarra/PAPERS/tianhe-2-dongarra-report.pdf|title=Visit to the National University for Defense Technology Changsha, China |date=2013-06-03 |access-date=2013-06-17 |last=Dongarra |first=Jack |publisher=[[Netlib]]}}</ref> the [[Meiko Scientific]] CS-2, [[Yellowstone (supercomputer)|Yellowstone]], the [[Earth Simulator]], the [[Cray X2]], the Connection Machine [[CM-5]], and various [[Altix]] supercomputers.{{citation needed|date=March 2016}} [[Mercury Computer Systems]] applied a variant of the fat tree topology—the [[hypertree network]]—to their [[multicomputer]]s.{{citation needed|date=March 2016}} In this architecture, 2 to 360 compute nodes are arranged in a [[Circuit switching|circuit-switched]] fat tree network.{{citation needed|date=March 2016}} Each node has local memory that can be mapped by any other node.{{vague|date=March 2016}} Each node in this heterogeneous system could be an [[Intel i860]], a [[PowerPC]], or a group of three [[Super Harvard Architecture Single-Chip Computer|SHARC]] [[digital signal processor]]s.{{citation needed|date=March 2016}} The fat tree network was particularly well suited to [[fast Fourier transform]] computations, which customers used for such [[signal processing]] tasks as [[radar]], [[sonar]], and [[medical imaging]].{{citation needed|date=March 2016}}
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