Open main menu
Home
Random
Recent changes
Special pages
Community portal
Preferences
About Wikipedia
Disclaimers
Incubator escapee wiki
Search
User menu
Talk
Dark mode
Contributions
Create account
Log in
Editing
Indirect branch
(section)
Warning:
You are not logged in. Your IP address will be publicly visible if you make any edits. If you
log in
or
create an account
, your edits will be attributed to your username, along with other benefits.
Anti-spam check. Do
not
fill this in!
==Example assembler syntax== :{| | [[MSP430]]: ||<code>br r15</code> |- | [[SPARC]]: ||<code>jmpl %o7</code> |- | [[MIPS architecture|MIPS]]: ||{{code|2=mips|jr $ra}} |- | [[x86]] (AT&T Syntax): ||{{code|2=asm|jmp *%eax}} |- | [[x86]] (Intel Syntax): ||{{code|2=nasm|jmp eax}} |- | [[ARM architecture|ARM]]: ||{{code|2=asm|BX r0}}, {{code|2=asm|mov pc, r2}} |- | [[Itanium]] (x86 family): ||<code>br.ret.sptk.few rp</code> |- | [[6502]]: ||{{code|2=ca65|jmp ($0DEA)}} |- | [[65C816]]: ||{{code|2=ca65|jsr ($0DEA,X)}} |- | [[6809]]: ||<code>jmp [$0DEA]</code>, <code>jmp B,X</code>, <code>jmp [B,X]</code> |- | [[Motorola 6800|6800]]: ||<code>jmp 0,X</code> |- | [[Z80]]: ||<code>jp (hl)</code> |- | [[Intel MCS-51]]: ||<code>jmp @A+DPTR</code> |- | [[Intel 8080]]: ||<code>pchl</code> |- | [[IBM System z]]: ||<code>bcr cond,r1</code><ref name="IBM"/> |- | [[PDP-11 architecture|PDP-11]]: ||<code>jmp @R5</code> |- |[[RISC-V]]: |<code>jalr x0, 0(x1)</code> |}
Edit summary
(Briefly describe your changes)
By publishing changes, you agree to the
Terms of Use
, and you irrevocably agree to release your contribution under the
CC BY-SA 4.0 License
and the
GFDL
. You agree that a hyperlink or URL is sufficient attribution under the Creative Commons license.
Cancel
Editing help
(opens in new window)