Editing Instruction cycle (section)

==Role of components==

=== Program counter ===
The [[program counter]] (PC) is a register that holds the memory address of the next instruction to be executed. After each instruction copy to the [[memory address register]] (MAR), the PC can either increment the pointer to the next sequential instruction, jump to a specified pointer, or branch conditionally to a specified pointer.<ref>{{Cite web |last=Dodge |first=N.B. |date=2017 |title=The Program Counter |url=https://personal.utdallas.edu/~dodge/EE2310/lec13.pdf |url-status=live |access-date=2025-01-03 |website=personal.utdallas.edu |type=Slides}}</ref> Also, during a [[HLT (x86 instruction)|CPU halt]], the PC holds the instruction being executed, until an external interrupt or a reset signal is received.

=== Memory address register ===
The MAR is responsible for storing the address describing the location of the instruction. After a read signal is initiated, the instruction in the address from the MAR is read and placed into the [[memory data register]] (MDR), also known as [[Memory buffer register|Memory Buffer Register]] (MBR). This component overall functions as an address buffer for pointing to locations in memory.

=== Memory data register ===
The MDR is responsible for temporarily holding instructions read from the address in MAR. It acts as a two-way register in the instruction cycle because it can take output from memory to the CPU, or output from the CPU to memory.

=== Current instruction register ===
The [[Instruction register|current instruction register]] (CIR, though sometimes referred to as the instruction register, IR) is where the instruction is temporarily held, for the CPU to decode it and produce correct control signals for the execution stage.

=== Control unit ===
The [[control unit]] (CU) decodes the instruction in the [[Instruction register|current instruction register]] (CIR). Then, the CU sends signals to other components within the CPU, such as the [[arithmetic logic unit]] (ALU), or back to memory to fetch operands, or to the [[floating-point unit]] (FPU). The ALU performs arithmetic operations based on specific [[Opcode|opcodes]] in the instruction. For example, in [[Reduced instruction set computer|RISC-V architecture]], funct3 and funct7 opcodes exist to distinguish whether an instruction is a logical or arithmetic operation.