Editing Intel 4004 (section)

==History==
===Original concept===
In April 1969, [[Busicom]] approached [[Intel]] and asked them to produce a twelve-chip set to handle the operations for an [[electronic calculator]].<ref name="IntelEra"/> They based their design on the architecture of the 1965 [[Olivetti Programma&nbsp;101]], one of the world's first tabletop [[programmable calculator]]s.<ref>{{cite web |url=https://www.oldcalculatormuseum.com/c-programma101.html |title=Olivetti Programma 101 Electronic Calculator |website=The Old Calculator Web Museum |quote=technically, the machine was a programmable calculator, not a computer.}}</ref><ref>{{Cite web
 | title= 2008/107/1 Computer, Programma 101, and documents (3), plastic / metal / paper / electronic components, hardware architect Pier Giorgio Perotto, designed by Mario Bellini, made by Olivetti, Italy, 1965–1971
 | website= www.powerhousemuseum.com
 | language= en
 | url= http://www.powerhousemuseum.com/collection/database/?irn=378406
 | access-date= March 20, 2016
}}
</ref> The key difference was that the Busicom design would use [[integrated circuit]]s to replace the [[printed circuit]] boards filled with individual components, and solid-state [[shift register]]s for memory instead of the costly [[Delay-line memory#Magnetostrictive delay lines|magnetostriction wire]] in the 101.

In contrast to earlier calculator designs, Busicom had developed a general-purpose processor concept with the goal of introducing it in a low-end desktop printing calculator, and then using the same design for other roles like [[cash register]]s and [[automatic teller machine]]s. The company had already produced a calculator using [[transistor-transistor logic|TTL]] [[small-scale integration]] logic ICs and were interested in having Intel reduce the chip count using Intel's [[medium-scale integration]] (MSI) techniques.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=10}}

Intel assigned the recently hired [[Marcian Hoff]], employee number 12, to act as the liaison between the two companies. In late June, three engineers from Busicom, [[Masatoshi Shima]] and his colleagues Masuda and Takayama, traveled to Intel to introduce the design. Although he had only been assigned to liaise with the engineers, Hoff began studying the concept. Their initial proposal had seven ICs: program control, [[Arithmetic logic unit|arithmetic unit]] (ALU), timing, program ROM, shift registers for temporary memory, printer controller and [[input/output]] control.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=11}}

Hoff became concerned that the number of chips and the required interconnections between them would make Busicom's price goals impossible to meet. Combining the chips would reduce the complexity and cost. He was also concerned that the still-small Intel would not have enough design staff to make seven separate chips at the same time. He raised these concerns with upper management, and [[Bob Noyce]], the CEO, told Hoff he would support a different approach if it seemed feasible.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=11}}

===Simplified design===
[[File:Chip_layout_from_the_development_phase_of_the_Intel_4004_from_1971,_the_first_microprocessor_of_the_world_(cropped_and_edited_image).jpg|thumb|Chip layout from the development phase of the Intel 4004]]

A key concept in the Busicom design was that the program control and ALU were not aimed specifically at the calculator market, it was the program in ROM that turned it into a calculator. The original idea was that the company could use the same chips with different amounts of shift-register RAM and program ROM to produce a range of calculating machines. Hoff was struck by how closely the Busicom's [[instruction set architecture]] matched that of general-purpose computers. He began to consider whether a truly general-purpose processor could be made cheaply enough to be used in a calculator.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=12}} When later asked where he got the ideas for the architecture of the first microprocessor, Hoff related that [[Plessey]], "a British tractor company",<ref>Possibly he had confused the Plessey name with that of [[Massey Ferguson]], makers of agricultural machinery.</ref> had donated a minicomputer to [[Stanford]], and he had "played with it some" while he was there. [[Tadashi Sasaki (engineer)|Tadashi Sasaki]] attributes the idea to break the calculator into four parts to an unnamed woman from the Nara Women's College present at a brainstorming meeting that was held in Japan prior to his first meeting with Intel.<ref>{{cite web
 |url        = http://www.ieeeghn.org/wiki/index.php/Oral-History:Tadashi_Sasaki
 |title      = Oral-History: Tadashi Sasaki
 |last       = Aspray
 |first      = William
 |date       = May 25, 1994
 |work       = Interview #211 for the Center for the History of Electrical Engineering
 |publisher  = The Institute of Electrical and Electronics Engineers, Inc.
 |access-date = January 2, 2013
}}</ref>

Another development that allowed this design to be made practical was Intel's work on the earliest [[dynamic RAM]] (DRAM) chips. Shift registers at that time were among the only low-cost read and write memory devices. However, [[shift register memory]] is not suited for random access, as each access must wait for the desired bit to flow through the chain. DRAM, on the other hand, allows random access, and the three transistor DRAM cell saves silicon area compared to the six transistor shift register cell.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=12}}

Finally, Hoff noticed that much of the complexity of the program control chip was due to every instruction being implemented separately. He suggested that the chip instead support [[subroutine]] calls and instructions be implemented as subroutines where possible. The application naturally suggested a 4-bit design, as this allowed direct manipulation of [[binary-coded decimal]] (BCD) values used by calculators. Hoff worked on the overall design concept through July and August 1969 but found that the Busicom executives seemed uninterested in his proposal.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=12}} Intel had to work smarter so Busicom would accept their proposal for the 141-PF calculator. They began to conceptualize a general purpose microprocessor that could be given instructions and return their results, as well as be able to merge all of the CPU functions of a computer.<ref name="3MinOn">{{cite video|url=https://m.youtube.com/watch?v=cVD5qKIY6ZM|date=November 20, 2014|title=3 Minutes On... The Intel 4004 Microprocessor|author=3 Minutes On...|work=[[YouTube]]|access-date=March 6, 2025}}</ref> Later in fall of that year, Intel's engineers proposed a new design of just four chips, including one that could be programmed for use; the programmable chip would end up becoming the 4004 microprocessor.<ref name="IntelEra"/>

===Mazor joins===
Unknown to Hoff, the Busicom team were extremely interested in his proposal. However, there were a number of specific issues that they were concerned about. One key issue was that certain routines like decimal adjust and keyboard handling would use large amounts of ROM space if implemented as subroutines. Another was that the design did not feature any sort of [[interrupt]], so dealing with real-time events would be difficult. Finally, storing the numbers as 4-bit BCD would require additional memory to store the sign and decimal place.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=13}}

In September 1969, [[Stanley Mazor]] joined Intel from Fairchild. Hoff and Mazor quickly came up with solutions to the Busicom concerns. To address the complexity of the subroutines, originally solved in Busicom's design using one-byte [[macroinstruction]]s and complex decoder circuitry, Mazor developed a 20-byte long [[Interpreter (computing)|interpreter]] that executed the same macroinstructions. Shima suggested adding a new interrupt that would be triggered by a pin, thereby allowing the keyboard to be interrupt-driven. He also modified the Branch Back (return from subroutine) instruction to clear the [[Accumulator (computing)|accumulator]].{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=14}}

To reach the price goals, it was important that the chip be as small as possible and use the fewest number of leads. As data was 4&nbsp;bits and the [[address space]] was 12&nbsp;bits (4096&nbsp;bytes), there was no way direct access could be arranged with anything fewer than about 24&nbsp;pins. This was not small enough, so the design would use a 16-pin [[dual in-line package]] (DIP) layout and use [[multiplexing]] of a single set of 4 lines. This meant specifying which address in ROM to access required three clock cycles, and another two to read it from memory. Running at 1&nbsp;MHz would allow it to perform math on the BCD values at about 80&nbsp;microseconds per digit.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=15}}

The result of the discussions between Intel and Busicom was an architecture that reduced the 7-chip Busicom design to a 4-chip Intel proposal composed of CPU, ROM, RAM and I/O (input-output) devices. The proposal was presented to a visiting team of Busicom executives in October 1969. They agreed that the new concept was superior and gave Intel the go-ahead to begin development. Hoff was upset to learn that the contract assigned all rights to the design to Busicom, in spite of it being designed entirely within Intel. The team then left for Japan, but Shima remained in California until December, developing many of the subroutines.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=15}}

===Faggin joins===
Neither Hoff nor Mazor, who worked in the Applications Research group, had experience designing the actual silicon, and the design group was already overworked with the development of memory devices. In April 1970, [[Leslie L. Vadász|Leslie Vadász]], who ran the MOS design group, hired [[Federico Faggin]] from [[Fairchild Semiconductor]] to take over the project.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=16}} Faggin had already made a name for himself by leading the entire development of the MOS silicon gate technology and the design of the first commercial integrated circuit (IC) made with it. The new technology was going to change the entire semiconductor market.

Integrated circuits consist of a number of individual components like transistors and resistors that are produced by mixing the underlying silicon with "dopants". This is normally accomplished by heating the chip in the presence of a chemical gas, which diffuses into the surface. Previously, the individual components were connected together to make a circuit using [[aluminum]] wires deposited on the surface. As aluminum melts at 600 degrees and silicon at 1000, the traces typically had to be deposited as the last step, which often complicated the production cycle.

In 1967, [[Bell Labs]] released a paper about making MOS transistors with self-aligned gates made of silicon rather than metal. These devices, however, were a proof-of-concept and could not be used to make ICs. Faggin and [[Tom Klein]] had taken what was a curiosity and developed the entire process technology needed to fabricate reliable ICs. Faggin also designed and produced the [[Federico Faggin#Fairchild 3708|Fairchild 3708]],<ref>{{cite web |url=http://www.intel4004.com/images/elect_cov_pg1.jpg |title=A faster generation of MOS devices with low thresholds is riding the crest of the new wave, silicon-gate IC's |last=Faggin |first=Federico |access-date=June 3, 2017}}</ref> the first IC made with SGT, first sold at the end of 1968, and featured on the cover of ''Electronics'' in September 1969.<ref>{{cite web |url=http://www.intel4004.com/papers.htm |title=''Earliest Published Papers'' |last=Faggin |first=Federico |access-date=June 3, 2017}}</ref>{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=16}} The silicon gate technology also reduced the leakage current by more than 100 times, making possible sophisticated dynamic circuits like DRAMs (dynamic random access memories). It also allowed the highly-doped silicon used for the gates to form the interconnections, greatly improving the circuit density of random-logic ICs like microprocessors.

This technique meant the interconnections could be performed at any time in the process. More importantly, the wiring was deposited using the same equipment that made the rest of the components. This meant that the slight differences in layout between different machine types was eliminated. Previously the interconnects had to be much larger than required in order to ensure the aluminum touched the silicon components which would be offset due to inaccuracies in the machinery. With this issue eliminated, the circuits could be placed much closer together, immediately doubling the density of the components, and thus reducing their cost by the same amount. Additionally, the aluminum wiring acted as [[capacitor]]s which limited the signal speed; removing these allowed the chips to run at faster speeds.<ref>{{cite web |url=http://www.intel4004.com/mrld.htm |title=The New Methodology for Random Logic Design |last=Faggin |first=Federico |access-date=June 3, 2017}}</ref><ref>Federico Faggin, T. Klein (1970). "Silicon-Gate Technology". ''Solid State Electronics''. Vol. 13. pp. 1125–1144</ref>

At Intel, Faggin began design of the new processor using this self-aligned gate process. Only days after Faggin joined the company Intel, Shima arrived from Japan. He was disappointed to learn that no work on the project had taken place since he left in December, and expressed his concern original schedule was now impossible. Faggin responded by working well into the night every day, and Shima stayed on for another six months to help. Faggin himself immersed himself in workweeks that spanned 70 to 80 hours.<ref>{{cite journal |first=Stephan |last=Cass |year=2021 |title=Intel's 4004 Turns 50 |journal=IEEE Spectrum |volume=58 |issue=11 |pages=9–10}}</ref> Additional advances were needed to reach the required circuit density. One of these advances was the use of "buried contacts"<ref>{{cite web |url=http://www.intel4004.com/buried.htm |title=The Buried Contact |last=Faggin |first=Federico |access-date=June 3, 2017}}</ref><ref>"Inductee Detail". National Inventors Hall of Fame. July 25, 2016.</ref> that allowed the silicon connecting wires to be directly connected to the components. Another was figuring out how to make adding "bootstrap loads" with silicon gate as part of one of the masking steps,<ref>{{cite web |url=http://www.intel4004.com/btstrp.htm |title=The Bootstrap Load |last=Faggin| first=Federico |access-date=June 3, 2017}}</ref> eliminating one step from the processing.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=16}} Without these two innovations by Faggin, Hoff's architecture could not have been realized in a single chip.

===Into production===
[[File:Intel 4004 on Busicom calculator circuit board.jpg|thumb|Intel 4004 CPU and associated chips on the circuit board from a Busicom calculator]]

Intel's chip-naming scheme at that time used a four-digit number for each component. The first digit indicated the process technology used, the second digit indicated the generic function, and the last two digits specified the sequential number in the development of that component type. Using this convention, the chips would have been known as the 1302, 1105, 1507, and 1202. Faggin felt this would obscure the fact that they formed a coherent set, and decided to name them as the "4000 family".<ref name="FFsign">{{cite web |title=Federico Faggin's Signature |publisher=Intel4004.com |url=http://www.intel4004.com/sign.htm |access-date=August 21, 2012}}</ref> The four chips were the following:
* the ''Intel 4001'', a 256-byte 4-bit ROM;
* the ''Intel 4002'', DRAM with four 20-[[nibble]] registers (total size 40 bytes);
* the ''Intel 4003'', an I/O chip comprising a 10-bit static shift register with serial and parallel outputs; and
* the ''Intel 4004'' CPU. 
A fully expanded system could support 16 Intel 4001s for a total of 4&nbsp;kB of ROM, 16 Intel 4002s for a total of 1,280 nibbles (640 bytes) of RAM, and an unlimited number of 4003s. The 4003s were connected to programmable input and output pins on the 4001 and to output pins on the 4002, not directly to the CPU.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=11}}
[[File:Busicom 141 PF 1.jpg|thumb|[[Busicom]] 141-PF]]
With the design complete, Shima returned to Japan to begin building a prototype of the calculator. The first wafers of the 4001 were processed in October 1970,{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=16}} followed by the 4003 and 4002 in November. The 4002 proved to have a minor problem that was easily corrected. The first 4004s arrived at the end of December, and were completely non-functional. Probing the chip, Faggin found that the buried-contact fabrication step had been left out. A second run was fabricated in January 1971 and the 4004 worked as expected except for two minor problems.

Faggin was sending samples of these chips to Shima as they arrived in February 1971.<ref name="IntelEra"/> In April of that year, they learned the calculator prototype was operational. Later that month Shima sent Intel the final masks for the 4001 ROMs, the design was now complete. It consisted of one 4004, two 4002, three 4003, and four 4001 chips. An additional 4001 supplied the optional square root function. One final change was added after Faggin found a problem in the 4001 and 4002 that occurred only when the chips were hot. Adding a new register decoder circuit in both solved the issue. Quantity production began in August 1971.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=17}}

===Marketing the 4004===
[[File:Intel 4004 ad.jpg|thumb|Intel 4004 advertisement in [[Electronic News]] magazine from 1971]]

During a call to Shima, Faggin learned that Busicom was in financial difficulty and would likely fail if the chip price was not reduced. Faggin then convinced Noyce to lower the price in exchange for releasing Intel from the exclusivity agreement. In May 1971, Busicom agreed to this, on the condition that it not be used for any other calculator project and that Intel would repay their $60,000 development costs.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=17}} With this change of marketing focus name of the chip family name was changed to '''MCS-4''', short for Micro Computer System, 4-bit.<ref name="FFsign"/>

Intel management was skeptical that their sales team could explain the product to their customers. As Intel was now successful in the memory market, they were concerned the 4004 might confuse the market and were hesitant to advertise it.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=17}} They feared current Intel customers might view the new product as competition, purchasing memory from competitors instead.<ref>{{Cite web |date= November 16, 2007|title=Intel 4004 Microprocessor 35th Anniversary |website=[[YouTube]] |url=https://www.youtube.com/watch?v=j00AULJLCNo }}</ref> Hoff and Mazor were also concerned that the design's limitations would make it less interesting to users who were accustomed to the new 16-bit [[minicomputer]]s entering the market at that time.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=18}}

This all changed in the summer of 1971, when Ed Gelbach, formerly of [[Texas Instruments]], took over the marketing department and immediately began plans to publicly announce the product.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=18}} This took place in the November 1971 when Intel ran ads "Announcing a new era of integrated electronics,"<ref>{{cite web |url=https://spectrum.ieee.org/chip-hall-of-fame-intel-4004-microprocessor |title=Chip Hall of Fame: Intel 4004 Microprocessor |last=Cass |first=Stephen |date=July 2, 2018 |access-date=February 5, 2019}}</ref> first appearing in the November 15 edition of ''[[Electronic News]]''.<ref name="Gilder 1990">{{Cite book |last=Gilder |first= George |title=Microcosm: the quantum revolution in economics and technology |publisher=Simon and Schuster |year=1990 |page=[https://archive.org/details/microcosm00geor/page/107 107] |url=https://archive.org/details/microcosm00geor |url-access=registration |isbn= 978-0-671-70592-3 |quote= Intel's first advertisement for the 4004 appeared in the November 15, 1971 issue of ''Electronic News''}}</ref>

===The 8008===
The 4004 became the first commercial microprocessor available for general use.{{efn|Several microprocessors had been designed or built by this point, but were not available for purchase outside the products they were part of.}} This was almost not the case.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=18}}

In December 1969, Intel was approached by Computer Terminal Corporation (CTC) to produce a custom bipolar memory chip for a [[computer terminal]] they were designing, the [[Datapoint 2200]]. Mazor and Hoff considered their CPU design and concluded it was not much more complicated than the 4004, and that it could be implemented as a single-chip 8-bit CPU.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=15}} A few weeks before they hired Faggin, in March 1970 Intel hired Hal Feeney to design the [[Intel 8008]], at that time called the 1201, following Intel's naming convention. However, CTC decided to initially proceed with a conventional TTL implementation of their CPU and the project was lowered in priority. Feeney was assigned to other projects and ultimately ended up helping Faggin with testing the 4000 family chips.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=19}}

In January 1971, Feeney was reassigned back to the 1201 under Faggin's supervision and production chips were available in March 1972. In May, Hoff and Mazor went on a speaking tour to introduce the two CPU designs around the USA. The tradeoffs between the two designs were that with the 4004 and its memory and I/O chips it was much easier to build a complete computer system while the 8008 was more flexible, had a larger 16&nbsp;kB address space, and offered more instructions. A significant difference is that while a minimal 4004 system could be built using only two chips, one 4004 and one 4001 (256-byte ROM), the 8008 would require at least 20 additional TTL components for interfacing with memory and I/O functions.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=19}}

The two designs found themselves being used in different roles. The 4004 was used where the cost of implementation was the major concern, and became widely used in embedded controllers for applications like [[microwave oven]]s or traffic lights and similar roles. The 8008 instead found itself mostly used in user-programmable applications, such as [[computer terminal]]s, [[microcomputer]]s and similar roles. This split in functionality remains to this day, with the former being known as a [[microcontroller]].{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=19}}