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Inverter (logic gate)
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==Description== {| class="wikitable floatright" style="text-align:center" |- ! colspan="2" | Inverter [[truth table]] |- bgcolor="#ddeeff" |colspan=1|'''Input''' || '''Output''' |- bgcolor="#ddeeff" | A || NOT A |- |{{no2|0}} || {{yes2|1}} |- |{{yes2|1}} || {{no2|0}} |} The NOT gate outputs a zero when given a one, and a one when given a zero. Hence, it inverts its inputs. Colloquially, this inversion of bits is called "flipping" bits.<ref name="VanHoutven2017">{{cite book |url=https://github.com/crypto101/crypto101.github.io/raw/master/Crypto101.pdf |first=Laurens |last=Van Houtven |year=2017 |title=Crypto 101 |page=17 }}</ref> As with all binary logic gates, other pairs of symbols {{mdash}} such as true and false, or high and low {{mdash}} may be used in lieu of one and zero. It is equivalent to the [[logical negation]] operator (Β¬) in [[mathematical logic]]. Because it has only one input, it is a [[unary operation]] and has the simplest type of [[truth table]]. It is also called the complement gate<ref>{{ cite web |url=https://www.uobabylon.edu.iq/eprints/publication_4_21167_1447.pdf |title=2.9 Digital Logic Gates |website=University of Babylon }}</ref> because it produces the [[ones' complement]] of a binary number, swapping 0s and 1s. The NOT gate is one of three basic logic gates from which any [[Boolean circuit]] may be built up. Together with the [[AND gate]] and the [[OR gate]], any function in binary mathematics may be implemented. All other [[logic gates]] may be made from these three.<ref name="Broesch2012">{{cite book |title=Practical Programmable Circuits: A Guide to PLDs, State Machines, and Microcontrollers |first=James D. |last=Broesch |year=2012 |page=19 |publisher=Elsevier Science |isbn=978-0323139267 |url=https://books.google.com/books?id=I7-v5CBVmfIC&pg=PA20 }}</ref> The terms "programmable inverter" or "controlled inverter" do not refer to this gate; instead, these terms refer to the [[XOR gate]] because it can conditionally function like a NOT gate.<ref name="VanHoutven2017" /><ref name="Broesch2012" />
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