Editing NEC V20 (section)

== Features ==
The V20's [[Die (integrated circuit)|die]] comprised 63,000 [[transistor]]s; more than double the 29,000 of the 8088 CPU.<ref name="x86guide-v20-5"/> The chip was designed for a clock [[duty cycle]] of 50%, compared to the 33% duty cycle used by the 8088.<ref name="pcm-dec1985"/> The V20 has two 16-bit wide internal databuses, allowing two data transfers to occur concurrently.<ref name="ieeem-nov2021"/> Differences like that meant that a V20 could typically complete more instructions in a given time than an Intel 8088 running at the same frequency.<ref name="cpu-world"/>

The V20 was fabricated in 2-micron CMOS technology.<ref name="shmj"/><ref name="pcm-dec1985"/> Early versions ran at speeds of 5, 8, and 10&nbsp;[[MHz]].<ref name="chipdb"/>{{rp|2}} In 1990, an upgrade to the fabrication process technology resulted in the V20H and V20HL, with improved performance and reduced power consumption.<ref name="shmj"/> Later versions added speeds of 12 and 16&nbsp;MHz. The V20HLs were also completely static, allowing their clock to be stopped.

The V20 was described as [[16-bit computing|16-bit]]s wide internally. It used an 8-bit external data bus that was multiplexed onto the same pins as the low byte of the address bus. Its 20-bit wide address bus was able to address 1&nbsp;MB of memory.

The V20 was reported to have been compatible with the Intel 8087 [[floating-point unit]] (FPU) coprocessor.<ref name="tpc-v20"/> NEC also designed their own FPU, the {{ill|μPD72091|jp|NEC Vシリーズ#NEC_uPD72091}}, which was cancelled before reaching production. They followed this with a revised design, the μPD72191, but it is unclear how many, if any, of this second part were produced.<ref name="tcs-necfpu"/>

The V30, a nearly identical CPU with a 16-bit wide external data bus, debuted on March 1, 1984.<ref name="x86guide-v30-10"/><ref name="shmj"/> It was pin and object-code compatible with the [[Intel 8086]].