Editing Pentium 4 (section)

==Microarchitecture==
{{more citations needed section|date=March 2021}}
In benchmark evaluations, the advantages of the [[NetBurst]] microarchitecture were unclear. With carefully optimized application code, the first Pentium 4s outperformed Intel's fastest Pentium III (clocked at 1.13&nbsp;GHz at the time), as expected. But in [[legacy system|legacy applications]] with many branching or [[x87]] floating-point instructions, the Pentium 4 would merely match or run slower than its predecessor. Its main downfall was a shared unidirectional bus. The NetBurst microarchitecture consumed more power and emitted more heat than any previous Intel or [[AMD]] microarchitectures.

As a result, the Pentium 4's introduction was met with mixed reviews: Developers disliked the Pentium 4, as it posed a new set of [[code optimization]] rules. For example, in mathematical applications, AMD's lower-clocked [[Athlon]] (the fastest-clocked model was clocked at 1.2&nbsp;GHz at the time) easily outperformed the Pentium 4, which would only catch up if software was re-compiled with [[SSE2]] support. Tom Yager of ''Infoworld'' magazine called it "the fastest CPU{{snd}}for programs that fit entirely in cache". Computer-savvy buyers avoided Pentium 4 PCs due to their price premium, questionable benefit, and initial restriction to Rambus' [[RDRAM]].<ref>{{Cite web|url=https://www.zdnet.com/article/new-pentium-4-rejects-rambus-memory/|title=New Pentium 4 rejects Rambus memory|website=[[ZDNet]]}}</ref><ref>{{Cite web|url=https://www.tomshardware.com/reviews/intel-ddr,403-4.html|title=Intel Goes DDR - do We Really Care?|date=17 December 2001}}</ref><ref>{{Cite web|url=http://www.dansdata.com/p4.htm|title=Review: Intel Pentium 4 CPU|website=www.dansdata.com}}</ref> In terms of product marketing, the Pentium 4's singular emphasis on clock frequency (above all else) made it a marketer's dream.<ref>{{Cite web|url=https://pcper.com/2011/08/yes-netburst-really-was-that-bad-cpu-architectures-tested/|title=Yes, Netburst really was that bad: CPU architectures tested - PC Perspective|date=3 August 2011 }}</ref> The result of this was that the NetBurst microarchitecture was often referred to as a [[marchitecture]]<ref name="elreg">{{Cite web|url=https://www.theregister.com/2000/08/21/pentium_4_platform_renamed/|title=Pentium 4 platform renamed|first=Mike|last=Magee|website=www.theregister.com}}</ref> by various computing websites and publications during the life of the Pentium 4. It was also called "NetBust",<ref>{{Cite web|url=https://www.theregister.com/2001/01/10/pentium_4_high_risk_strategy/|title = Pentium 4 high risk strategy for Intel}}</ref><ref name="elreg"/> a term popular with reviewers who reflected negatively upon the processor's performance.

The two classical metrics of CPU performance are [[instructions per cycle]] (IPC) and [[clock speed]]. While IPC is difficult to quantify due to dependence on the [[benchmark (computing)|benchmark]] application's instruction mix, clock speed is a simple measurement yielding a single absolute number. Unsophisticated buyers would simply consider the processor with the highest clock speed to be the best product, and the Pentium 4 had the fastest clock speed. Because AMD's processors had slower clock speeds, it countered Intel's marketing advantage with the "[[megahertz myth]]" campaign. AMD product marketing used a "[[Performance Rating|PR-rating]]" system, which assigned a merit value based on relative performance to a baseline machine.

[[File:Intel Pentium 4 1,5 GHz Willamette Socket 423.jpg|thumb|Pentium 4 Willamette 1.5&nbsp;GHz on Socket 423]]
[[File:Pentium 4 Prescott 2.40GHz.jpg|thumb|Pentium 4 Prescott 2.4&nbsp;GHz on Socket 478]]
[[File:Intel Pentium 4 HT 3.00 GHz Prescott microprocessor Overclocking.JPG|thumb|Pentium 4 HT Prescott 3.0&nbsp;GHz on Socket 478]]

At the launch of the Pentium 4, Intel stated that NetBurst-based processors were expected to scale to 10&nbsp;GHz<ref>{{Cite web|url=https://www.anandtech.com/show/680|title=The future of Intel's manufacturing processes|first=Anand Lal|last=Shimpi|website=www.anandtech.com}}</ref> after several [[Semiconductor fabrication|fabrication process]] generations. However, the clock speed of processors using the NetBurst microarchitecture reached a maximum of 3.8&nbsp;GHz. Intel had not anticipated a rapid upward scaling of [[Leakage (electronics)#In semiconductors|transistor power leakage]] that began to occur as the die reached the 90&nbsp;nm lithography and smaller. This new power leakage phenomenon, along with the standard thermal output, created cooling and clock scaling problems as clock speeds increased. Reacting to these unexpected obstacles, Intel attempted several core redesigns ([[#Prescott|Prescott]] most notably) and explored new manufacturing technologies, such as using multiple cores, increasing FSB speeds, increasing the cache size, and using a longer instruction pipeline along with higher clock speeds.

The code cache was replaced by a [[trace cache]] which contained decoded microoperations rather than instructions with advantage of eliminating instruction decoding bottleneck so that the design can use RISC technology.<ref name="FogMicro">{{cite report |url=http://www.agner.org/optimize/microarchitecture.pdf |title=The microarchitecture of Intel, AMD and VIA CPUs |last1=Fog |first1=Agner |date=2017-05-02 |publisher=Technical University of Denmark |access-date=2018-04-08 |archive-url=https://web.archive.org/web/20170328065929/http://agner.org/optimize/microarchitecture.pdf |archive-date=2017-03-28 |url-status=live}}</ref>{{Rp|page=48}} This came with a disadvantage of less compact cache taking up more chip space and consuming power.{{r|FogMicro|p=48}}

These solutions failed, and from 2003 to 2005, Intel shifted development away from NetBurst to focus on the cooler-running [[Pentium M (microarchitecture)|Pentium M]] microarchitecture. On January 5, 2006, Intel launched the Core processors, which put greater emphasis on energy efficiency and performance per clock cycle. The final NetBurst-derived products were released in 2007, with all subsequent product families switching exclusively to the Core microarchitecture.{{Cn|date=July 2022}}

=== Testing and validation ===
According to Bob Bentley, presenting on behalf of Intel at the 38th annual Design Automation Conference, "The microarchitecture of the Pentium 4 processor is significantly more complex than any previous IA-32 microprocessor, so the challenge of validating the logical correctness of the design in a timely fashion was indeed a daunting one." He hired a team of 60 recent graduates to help with testing and validation.<ref>Bob Bentley, Intel, at ''DAC '01: Proceedings of the 38th annual Design Automation Conference'', June 2001, {{ISBN|1581132972}}, pages 244-248
{{doi|10.1145/378239}}, [https://www.cs.rice.edu/~vardi/comp607/bentley.pdf paper] [https://dl.acm.org/doi/10.1145/378239.378473#sec-comments conference reference]</ref>