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Pin grid array
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== Chip mounting == [[File:80486 open.jpg|thumb|right|Underside of an 80486 with lid removed shows die and wire bonded connections.]] The chip can be mounted either on the top or the bottom (the pinned side). Connections can be made either by [[wire bonding]] or through [[flip chip]] mounting. Typically, PGA packages use wire bonding when the chip is mounted on the pinned side, and flip chip construction when the chip is on the top side. Some PGA packages contain multiple dies, for example [[Zen 2]] and [[Zen 3]] Ryzen CPUs for the [[Socket AM4|AM4 socket]]. === Flip chip === [[File:Ppga.jpg|thumb|right|The underside of a FC-PGA package (The die is on the other side.)]] A [[flip-chip]] pin grid array (FC-PGA or FCPGA) is a form of pin grid array in which the [[Die (integrated circuit)|die]] faces downwards on the top of the substrate with the back of the die exposed. This allows the die to have a more direct contact with the [[heatsink]] or other cooling mechanism. FC-PGA CPUs were introduced by [[Intel]] in 1999, for Coppermine core [[Pentium III]] and [[Celeron]]<ref>{{cite web | title=Intel Releases New Design for sub-$1,000 PCs | publisher=Philippine Daily Inquirer | date=April 24, 2000 }}</ref> processors based on [[Socket 370]], and were produced until [[Intel Socket G3|Socket G3]] in 2013. FC-PGA processors fit into [[zero insertion force]] (ZIF) [[CPU socket|motherboard sockets]]; similar packages were also used by AMD.<!--FIXME: does AMD use the name FC-PGA or some term of their own?-->
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