Editing Pipeline (computing) (section)

== Concept and motivation ==
Pipelining is a commonly used concept in everyday life. For example, in the [[assembly line]] of a car factory, each specific task—such as installing the engine, installing the hood, and installing the wheels—is often done by a separate work station. The stations carry out their tasks in parallel, each on a different car. Once a car has had one task performed, it moves to the next station. Variations in the time needed to complete the tasks can be accommodated by "buffering" (holding one or more cars in a space between the stations) and/or by "stalling" (temporarily halting the upstream stations), until the next station becomes available.

Suppose that assembling one car requires three tasks that take 20, 10, and 15 minutes, respectively. Then, if all three tasks were performed by a single station, the factory would output one car every 45 minutes. By using a pipeline of three stations, the factory would output the first car in 45 minutes, and then a new one every 20 minutes.

As this example shows, pipelining does not decrease the [[latency (engineering)|latency]], that is, the total time for one item to go through the whole system. It does however increase the system's [[throughput]], that is, the rate at which new items are processed after the first one.

=== In computing ===
In [[computing]], a pipeline or data pipeline<ref>[https://www.dativa.com/data-pipelines/ Data Pipeline Development] {{Webarchive|url=https://web.archive.org/web/20180524151334/https://www.dativa.com/data-pipelines/|date=2018-05-24}} Published by Dativa, retrieved 24 May, 2018</ref> is a set of [[data]] processing elements connected in series, where the output of one element is the input of the next one. The elements of a pipeline are often executed in parallel or in time-sliced fashion. Some amount of [[buffer (computer science)|buffer storage]] is often inserted between elements.

Computer-related pipelines include:
* [[Instruction pipeline]]s, such as the [[classic RISC pipeline]], which are used in [[central processing unit]]s (CPUs) and other [[Microprocessor|microprocessors]] to allow overlapping execution of multiple instructions with the same [[digital electronics|circuitry]]. The circuitry is usually divided up into stages and each stage processes a specific part of one instruction at a time, passing the partial results to the next stage. Examples of stages are instruction decode, arithmetic/logic and register fetch. They are related to the technologies of [[superscalar execution]], [[operand forwarding]], [[speculative execution]] and [[out-of-order execution]].
* [[Graphics pipeline]]s, found in most [[graphics processing unit]]s (GPUs), which consist of multiple [[arithmetic and logical unit|arithmetic unit]]s, or complete [[central processing unit|CPU]]s, that implement the various stages of common rendering operations ([[perspective projection]], window [[clipping (computer graphics)|clipping]], [[color]] and [[light]] calculation, rendering, etc.).
* [[pipeline (software)|Software pipeline]]s, which consist of a sequence of computing [[process (computing)|processes]] (commands, program runs, tasks, threads, procedures, etc.), conceptually executed in parallel, with the output stream of one process being automatically fed as the input stream of the next one. The [[Unix]] system call [[pipeline (Unix)|pipe]] is a classic example of this concept.
* [[HTTP pipelining]], the technique of issuing multiple [[HTTP]] requests through the same [[TCP connection]], without waiting for the previous one to finish before issuing a new one.