Editing Planar process (section)

==Overview==
The key concept is to view a circuit in its two-dimensional projection (a plane), thus allowing the use of [[photographic processing]] concepts such as film negatives to mask the projection of light exposed chemicals. This allows the use of a series of exposures on a substrate ([[silicon]]) to create [[silicon oxide]] (insulators) or doped regions (conductors). Together with the use of metallization, and the concepts of [[p–n junction isolation]] and [[surface passivation]], it is possible to create circuits on a single silicon crystal slice (a wafer) from a monocrystalline silicon boule.

The process involves the basic procedures of [[silicon dioxide]] (SiO<sub>2</sub>) oxidation, SiO<sub>2</sub> etching and heat diffusion. The final steps involves [[Thermal oxidation|oxidizing]] the entire wafer with an SiO<sub>2</sub> layer, etching contact vias to the transistors, and depositing a covering metal layer over the [[oxide]], thus connecting the transistors without manually wiring them together.