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Processor design
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== Details == {{Prose|section|date=May 2011}} === Basics === CPU design is divided into multiple components. Information is transferred through [[datapath]]s (such as [[Arithmetic logic unit|ALUs]] and [[Pipeline (computing)|pipelines]]). These datapaths are controlled through logic by [[control unit]]s. [[Memory (computing)|Memory]] components include [[register file]]s and [[Cache (computing)|caches]] to retain information, or certain actions. [[Clock signal|Clock circuitry]] maintains internal rhythms and timing through clock drivers, [[Phase-locked loop|PLLs]], and [[clock distribution network]]s. Pad transceiver circuitry which allows signals to be received and sent and a [[logic gate]] cell [[Library (electronics)|library]] which is used to implement the logic. Logic gates are the foundation for processor design as they are used to implement most of the processor's components.<ref>{{cite book | url=https://books.google.com/books?id=GBVADQAAQBAJ&q=processor+logic+gates | title=Digital Systems: From Logic Gates to Processors | isbn=978-3-319-41198-9 | last1=Deschamps | first1=Jean-Pierre | last2=Valderrama | first2=Elena | last3=TerΓ©s | first3=LluΓs | date=12 October 2016 | publisher=Springer }}</ref> CPUs designed for high-performance markets might require custom (optimized or application specific (see below)) designs for each of these items to achieve frequency, [[power consumption|power-dissipation]], and chip-area goals whereas CPUs designed for lower performance markets might lessen the implementation burden by acquiring some of these items by purchasing them as [[intellectual property]]. Control logic implementation techniques ([[logic synthesis]] using CAD tools) can be used to implement datapaths, register files, and clocks. Common logic styles used in CPU design include unstructured random logic, [[finite-state machine]]s, [[microprogramming]] (common from 1965 to 1985), and [[Programmable logic array]]s (common in the 1980s, no longer common). === Implementation logic === Device types used to implement the logic include: * Individual [[vacuum tube]]s, individual [[transistor]]s and semiconductor [[diode]]s, and [[transistor-transistor logic]] [[small-scale integration]] logic chips β no longer used for CPUs * [[Programmable array logic]] and [[programmable logic device]]s β no longer used for CPUs * [[Emitter-coupled logic]] (ECL) [[gate array]]s β no longer common * [[CMOS]] [[gate array]]s β no longer used for CPUs * [[CMOS]] [[Integrated circuit|mass-produced IC]]s β the vast majority of CPUs by volume * [[CMOS]] [[Application-specific integrated circuit|ASIC]]s β only for a minority of special applications due to expense * [[Field-programmable gate array]]s (FPGA) β common for [[soft microprocessor]]s, and more or less required for [[reconfigurable computing]] A CPU design project generally has these major tasks: * Programmer-visible [[instruction set architecture]], which can be implemented by a variety of [[microarchitecture]]s * Architectural study and performance modeling in [[ANSI C]]/[[C++]] or [[SystemC]]{{clarify|date=January 2013}} * [[High-level synthesis]] (HLS) or [[register transfer level]] (RTL, e.g. logic) implementation * [[Register transfer language|RTL]] verification * [[Circuit design]] of speed critical components (caches, registers, ALUs) * [[Logic synthesis]] or logic-gate-level design * [[Static timing analysis|Timing analysis]] to confirm that all logic and circuits will run at the specified operating frequency * Physical design including [[Floorplan (microelectronics)#Floorplanning|floorplanning]], [[place and route]] of logic gates * Checking that RTL, gate-level, transistor-level and physical-level representations are equivalent * Checks for [[signal integrity]], [[design rule checking|chip manufacturability]] Re-designing a CPU core to a smaller die area helps to shrink everything (a "[[photomask]] shrink"), resulting in the same number of transistors on a smaller die. It improves performance (smaller transistors switch faster), reduces power (smaller wires have less [[parasitic capacitance]]) and reduces cost (more CPUs fit on the same wafer of silicon). Releasing a CPU on the same size die, but with a smaller CPU core, keeps the cost about the same but allows higher levels of integration within one [[very-large-scale integration]] chip (additional cache, multiple CPUs or other components), improving performance and reducing overall system cost. As with most complex electronic designs, the [[functional verification|logic verification]] effort (proving that the design does not have bugs) now dominates the project schedule of a CPU. Key CPU architectural innovations include [[index register]], [[CPU cache|cache]], [[virtual memory]], [[instruction pipelining]], [[superscalar]], [[Complex instruction set computer|CISC]], [[Reduced instruction set computer|RISC]], [[virtual machine]], [[emulator]]s, [[microprogram]], and [[Stack (data structure)|stack]]. === Microarchitectural concepts === {{Main|Microarchitecture}} === Research topics === <!-- [[virtual memory]] moved to [[Computer architecture]] --> {{Main|History of general-purpose CPUs#1990 to today: Looking forward}} A variety of [[History of general-purpose CPUs#1990 to today: Looking forward|new CPU design ideas]] have been proposed, including [[reconfigurable logic]], [[clockless CPU]]s, [[computational RAM]], and [[optical computing]]. ===Performance analysis and benchmarking=== {{Main| Computer performance}} [[benchmark (computing)|Benchmarking]] is a way of testing CPU speed. Examples include SPECint and [[SPECfp]], developed by [[Standard Performance Evaluation Corporation]], and ConsumerMark developed by the Embedded Microprocessor Benchmark Consortium [[EEMBC]]. Some of the commonly used metrics include: * [[Instructions per second]] - Most consumers pick a computer architecture (normally [[Intel]] [[IA32]] architecture) to be able to run a large base of pre-existing pre-compiled software. Being relatively uninformed on computer benchmarks, some of them pick a particular CPU based on operating frequency (see [[Megahertz Myth]]). * [[FLOPS]] - The number of floating point operations per second is often important in selecting computers for scientific computations. * [[Performance per watt]] - System designers building [[parallel computing|parallel computers]], such as [[Google search technology#Current hardware|Google]], pick CPUs based on their speed per watt of power, because the cost of powering the CPU outweighs the cost of the CPU itself.<ref>{{cite web|url=http://www.eembc.org/benchmark/consumer.asp?HTYPE=SIM|title=EEMBC ConsumerMark|archive-url=https://web.archive.org/web/20050327005323/http://www.eembc.org/benchmark/consumer.asp?HTYPE=SIM |archive-date=March 27, 2005}}</ref><ref>{{cite web|url=https://www.zdnet.com/article/power-could-cost-more-than-servers-google-warns/|title=Power could cost more than servers, Google warns|author=Stephen Shankland|website=[[ZDNet]]|date=December 9, 2005}}</ref> * Some system designers building parallel computers pick CPUs based on the speed per dollar. * System designers building [[real-time computing]] systems want to guarantee worst-case response. That is easier to do when the CPU has low [[interrupt latency]] and when it has deterministic response. ([[Digital signal processor|DSP]]) * Computer programmers who program directly in assembly language want a CPU to support a full featured [[instruction set]]. * Low power - For systems with limited power sources (e.g. solar, batteries, human power). * Small size or low weight - for portable embedded systems, systems for spacecraft. * Environmental impact - Minimizing environmental impact of computers during manufacturing and recycling as well during use. Reducing waste, reducing hazardous materials. (see [[Green computing]]). <!-- ... Are there other measures of "goodness", "figures of merit", that I'm missing here? --> There may be tradeoffs in optimizing some of these metrics. In particular, many design techniques that make a CPU run faster make the "performance per watt", "performance per dollar", and "deterministic response" much worse, and vice versa.
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