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Signed number representations
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== History == The early days of digital computing were marked by competing ideas about both hardware technology and mathematics technology (numbering systems). One of the great debates was the format of negative numbers, with some of the era's top experts expressing very strong and differing opinions.{{Citation needed|reason=Please reference these debates|date=May 2012}} One camp supported [[two's complement]], the system that is dominant today. Another camp supported ones' complement, where a negative value is formed by inverting all of the bits in its positive equivalent. A third group supported sign–magnitude, where a value is changed from positive to negative simply by toggling the word's highest-order bit. There were arguments for and against each of the systems.<!--{{Citation needed|reason=Cite these arguments|date=May 2012}}--the rest of the article gives reasons --> Sign–magnitude allowed for easier tracing of memory dumps (a common process in the 1960s) as small numeric values use fewer 1 bits.<!-- this is obvious enough --> These systems did ones' complement math internally, so numbers would have to be converted to ones' complement values when they were transmitted from a register to the math unit and then converted back to sign–magnitude when the result was transmitted back to the register<!--{{Citation needed|reason=Cite one of these systems|date=May 2012}}-- this is the most hardware efficient way to do it. It is likely how they did it-->. The electronics required more gates than the other systems{{snd}}a key concern when the cost and packaging of discrete transistors were critical. IBM was one of the early supporters of sign–magnitude, with their [[IBM 704|704]], [[IBM 709|709]] and [[IBM 7090|709x]] series computers being perhaps the best-known systems to use it. Ones' complement allowed for somewhat simpler hardware designs, as there was no need to convert values when passed to and from the math unit. But it also shared an undesirable characteristic with sign–magnitude: the ability to represent [[negative zero]] (−0). Negative zero behaves exactly like positive zero: when used as an operand in any calculation, the result will be the same whether an operand is positive or negative zero. The disadvantage is that the existence of two forms of the same value necessitates two comparisons when checking for equality with zero. Ones' complement subtraction can also result in an [[end-around borrow]] (described below). It can be argued that this makes the addition and subtraction logic more complicated or that it makes it simpler, as a subtraction requires simply inverting the bits of the second operand as it is passed to the adder. The [[PDP-1]], [[CDC 160 series]], [[CDC 3000]] series, [[CDC 6000 series]], [[UNIVAC 1100]] series, and [[LINC]] computer use ones' complement representation. Two's complement is the easiest to implement in hardware, which may be the ultimate reason for its widespread popularity.<ref>{{cite journal|title=Two's complement computation sharing multiplier and its applications to high performance DFE|first1=Hunsoo|last1=Choo|first2=K.|last2=Muhammad|first3=K.|last3=Roy|journal=IEEE Transactions on Signal Processing|volume=51|issue=2|date=February 2003|pages=458–469|doi=10.1109/TSP.2002.806984|bibcode=2003ITSP...51..458C |url=https://www.academia.edu/29135370}}</ref> Processors on the early mainframes often consisted of thousands of transistors, so eliminating a significant number of transistors was a significant cost savings. Mainframes such as the [[IBM System/360]], the [[GE-600 series]],<ref>{{cite book|url=http://ed-thelen.org/comp-hist/GE-635.html#Binary%20Fixed-Point%20Numbers|title=GE-625 / 635 Programming Reference Manual|publisher=[[General Electric]]|date=January 1966|access-date=August 15, 2013}}</ref> and the [[PDP-6]] and [[PDP-10]] use two's complement, as did minicomputers such as the [[PDP-5]] and [[PDP-8]] and the [[PDP-11]] and [[VAX]] machines. The architects of the early integrated-circuit-based CPUs ([[Intel 8080]], etc.) also chose to use two's complement math. As IC technology advanced, two's complement technology was adopted in virtually all processors, including [[x86]],<ref>{{cite book|url=http://download.intel.com/products/processor/manual/325462.pdf|title=Intel 64 and IA-32 Architectures Software Developer's Manual|at=Section 4.2.1|publisher=[[Intel]]|access-date=August 6, 2013}}</ref> [[m68k]], [[Power ISA]],<ref>{{cite book|url=https://fileadmin.cs.lth.se/cs/education/EDAN25/PowerISA_V2.07_PUBLIC.pdf|title=Power ISA Version 2.07|at=Section 1.4|publisher=[[Power.org]]|access-date=November 2, 2023}},</ref> [[MIPS architecture|MIPS]], [[SPARC]], [[ARM architecture|ARM]], [[Itanium]], [[PA-RISC]], and [[DEC Alpha]].
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