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TRIAC
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==Operation== {{multiple image | total_width = 500 | image1 = Triacquadrants.svg | caption1 = Figure 1: Triggering modes. Quadrants, 1 (top right), 2 (top left), 3 (bottom left), 4 (bottom right); voltages relative to MT1 | image2 = TRIAC Equivalent Circuit.png | caption2 = Figure 2: Triggering modes as seen by dividing the triac's 4 alternating PN layers into 2 transistors (one a NPN and other a PNP with both of their gates connected). | image3 = Triac structure.svg | caption3 = Figure 3: TRIAC semiconductor construction }} To understand how TRIACs work, consider the triggering in each of the four possible combinations of gate and MT2 voltages with respect to MT1. The four separate cases (quadrants) are illustrated in Figure 1. Main Terminal 1 (MT1) and Main Terminal 2 (MT2) are also referred to as Anode 1 (A1) and Anode 2 (A2) respectively.<ref name="ThyristorTheory"/> The relative sensitivity depends on the physical structure of a particular triac, but as a rule, quadrant I is the most sensitive (least gate current required), and quadrant 4 is the least sensitive (most gate current required).{{Clarify|post-text=Why is Q-IV the least sensitive? See [[Talk:TRIAC#Request of explanation: why Q-IV is the least sensitive quadrant?|discussion]]| date=October 2011}} In quadrants 1 and 2, MT2 is positive, and current flows from MT2 to MT1 through P, N, P and N layers. The N region attached to MT2 does not participate significantly. In quadrants 3 and 4, MT2 is negative, and current flows from MT1 to MT2, also through P, N, P and N layers. The N region attached to MT2 is active, but the N region attached to MT1 only participates in the initial triggering, not the bulk current flow. In most applications, the gate current comes from MT2, so quadrants 1 and 3 are the only operating modes (both gate and MT2 positive or negative against MT1). Other applications with single polarity triggering from an IC or digital drive circuit operate in quadrants 2 and 3, where MT1 is usually connected to positive voltage (e.g. +5V) and gate is pulled down to 0V (ground). === Quadrant 1 === {{multiple image | total_width = 400 | align = left | image1 = Triac Quad I.svg | caption1 = Figure 3: Operation in quadrant 1 | image2 = Triac Quad I like SCR.JPG | caption2 = Figure 4: Equivalent electric circuit for a TRIAC operating in quadrant 1 }} Quadrant 1 operation occurs when the gate and MT2 are positive with respect to MT1.<sup>[[#figure1|Figure 1]]</sup> The mechanism is illustrated in Figure 3. The gate current makes an equivalent NPN transistor switch on, which in turn draws current from the base of an equivalent PNP transistor, turning it on also. Part of the gate current (dotted line) is lost through the ohmic path across the p-silicon, flowing directly into MT1 without passing through the NPN transistor base. In this case, the injection of holes in the p-silicon makes the stacked n, p and n layers beneath MT1 behave like a NPN transistor, which turns on due to the presence of a current in its base. This, in turn, causes the p, n and p layers over MT2 to behave like a PNP transistor, which turns on because its n-type base becomes forward-biased with respect to its emitter (MT2). Thus, the triggering scheme is the same as an SCR. The equivalent circuit is depicted in Figure 4. However, the structure is different from SCRs. In particular, TRIAC always has a small current flowing directly from the gate to MT1 through the p-silicon without passing through the p-n junction between the base and the emitter of the equivalent NPN transistor. This current is indicated in Figure 3 by a dotted red line and is the reason why a TRIAC needs more gate current to turn on than a comparably rated SCR.<ref name="PowerElec"/> Generally, this quadrant is the most sensitive of the four. This is because it is the only quadrant where gate current is injected directly into the base of one of the main device transistors.<ref>{{Cite web|title=TRIAC β Operation, symbol, circuits & applications|url=https://www.electricalclassroom.com/triac-operation-symbol-circuits/|website=Electrical Classroom|date=15 July 2021 }}</ref> ===Quadrant 2=== [[file:Triac Quad II.svg|thumb|Figure 5: Operation in quadrant 2]] Quadrant 2 operation occurs when the gate is negative and MT2 is positive with respect to MT1.<sup>[[#figure1|Figure 1]]</sup> Figure 5 shows the triggering process. The turn-on of the device is three-fold and starts when the current from MT1 flows into the gate through the p-n junction under the gate. This switches on a structure composed by an NPN transistor and a PNP transistor, which has the gate as cathode (the turn-on of this structure is indicated by "1" in the figure). As current into the gate increases, the potential of the left side of the p-silicon under the gate rises towards MT1, since the difference in potential between the gate and MT2 tends to lower: this establishes a current between the left side and the right side of the p-silicon (indicated by "2" in the figure), which in turn switches on the NPN transistor under the MT1 terminal and as a consequence also the pnp transistor between MT2 and the right side of the upper p-silicon. So, in the end, the structure which is crossed by the major portion of the current is the same as quadrant-I operation ("3" in Figure 5).<ref name="PowerElec"/> ===Quadrant 3=== [[file:Triac Quad III.svg|thumb|Figure 6: Operation in quadrant 3]] Quadrant 3 operation occurs when the gate and MT2 are negative with respect to MT1.<sup>[[#figure1|Figure 1]]</sup> The whole process is outlined in Figure 6. The process happens in different steps here too. In the first phase, the pn junction between the MT1 terminal and the gate becomes forward-biased (step 1). As forward-biasing implies the injection of minority carriers in the two layers joining the junction, electrons are injected in the p-layer under the gate. Some of these electrons do not recombine and escape to the underlying n-region (step 2). This in turn lowers the potential of the n-region, acting as the base of a pnp transistor which switches on (turning the transistor on without directly lowering the base potential is called '''remote gate control'''). The lower p-layer works as the collector of this PNP transistor and has its voltage heightened: this p-layer also acts as the base of an NPN transistor made up by the last three layers just over the MT2 terminal, which, in turn, gets activated. Therefore, the red arrow labeled with a "3" in Figure 6 shows the final conduction path of the current.<ref name="PowerElec"/> ===Quadrant 4=== [[file:Triac Quad IV.svg|thumb|left|Figure 7: Operation in quadrant 4]] Quadrant 4 operation occurs when the gate is positive and MT2 is negative with respect to MT1. <sup>[[#figure1|Figure 1]]</sup> Triggering in this quadrant is similar to triggering in quadrant III. The process uses a remote gate control and is illustrated in Figure 7. As current flows from the p-layer under the gate into the n-layer under MT1, minority carriers in the form of free electrons are injected into the p-region and some of them are collected by the underlying n-p junction and pass into the adjoining n-region without recombining. As in the case of a triggering in quadrant III, this lowers the potential of the n-layer and turns on the PNP transistor formed by the n-layer and the two p-layers next to it. The lower p-layer works as the collector of this PNP transistor and has its voltage heightened: this p-layer also acts as the base of an NPN transistor made up by the last three layers just over the MT2 terminal, which, in turn, gets activated. Therefore, the red arrow labeled with a "3" in Figure 6 shows the final conduction path of the current.<ref name="PowerElec"/> Generally, this quadrant is the least sensitive of the four.<ref name="ThyristorTheory"/> In addition, some models of TRIACs (three-quadrant high commutation triacs named by different suppliers as "logic level", "snubberless" or "Hi-Com" types) cannot be triggered in this quadrant but only in the other three.
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