Editing Zilog Z80 (section)

== History ==
[[File:Zilog Z-80 Microprocessor ad May 1976.jpg|thumb|upright=1.5|A May 1976 advertisement for the Z80 outlines its major advantages over the 8080.]]
[[File:Z80-Z0840004PSC-HD.jpg|thumb|upright=1.5|Photo of the original Zilog Z80 [[microprocessor]] design in [[depletion-load nMOS]]. Total [[Die (integrated circuit)|die]] size is 3545×3350&nbsp;μm. The blue squares around the outside are the pads that connect to the external pins. This chip was manufactured in 1990.]]
[[File:Z84C0010FEC LQFP.png|thumb|A [[CMOS]] Z80 in a 44-pin [[quad flat package]].]]

=== Early history ===
At [[Fairchild Semiconductor]], and later at [[Intel]], [[physicist]] and [[engineer]] [[Federico Faggin]] had been working on fundamental [[transistor]] and [[semiconductor]] manufacturing technology. He also developed the basic design methodology used for memories and [[microprocessor]]s at Intel and led the work on the [[Intel 4004]], the [[Intel 8080]] and several other ICs. [[Masatoshi Shima]] was the principal logic and transistor-level designer of the 4004 and the 8080 under Faggin's supervision, while [[Ralph Ungermann]] was in charge of custom [[integrated circuit]] design.{{sfn|Faggin|Shima|Ungermann|2007|p=1}}

In early 1974, Intel viewed microprocessors not so much as products to be sold on their own but as a way to sell more of its main products, [[static RAM]] and [[ROM]]. A reorganization placed some of the formerly independent sections under the direction of Les Vadasz, further diluting the microprocessor's place in the company. That year, the [[1973–1975 recession]] reached a peak, and Intel laid off several employees.{{sfn|Faggin|Shima|Ungermann|2007|p=1}} All of this led to Faggin becoming restless, and he invited Ungermann out for drinks and asked if he would be interested in starting their own company. Ungermann immediately agreed, and as he had less to do at Intel, he left in August or September, followed by Faggin, whose last day at Intel was Halloween 1974.{{sfn|Faggin|Shima|Ungermann|2007|p=2}} When Shima heard, he asked to come to the new company as well, but having no actual product design or money, they told him to wait.{{sfn|Faggin|Shima|Ungermann|2007|p=3}}

The newly formed and unnamed company initially began designing a single-chip [[microcontroller]] called the 2001. They met with [[Synertek]] to discuss fabrication on their lines, and when Faggin began to understand the costs involved, it became clear that a low-cost product like this would not be able to compete with a design from a company with its own production lines, like Intel. They then began considering a more complex microprocessor instead, initially known as the Super 80, with the main feature being its use of a +5&nbsp;V bus{{sfn|Faggin|Shima|Ungermann|2007|p=3}} instead of the more common −5, +5 and 12&nbsp;V used by designs like the 8080. The new design was intended to be compatible with the 8080, but add a number of the features of the [[Motorola 6800]], including [[index register]]s and improved [[interrupt]]s.{{sfn|Faggin|Shima|Ungermann|2007|p=4}}

=== Exxon investment, detailed development begins ===
While still being set up, the industry newsletter ''Electronic News'' heard of them and published a story on the newly formed company. This attracted the attention of Exxon Enterprises, [[Exxon]]'s high-tech investment arm. At the time, in the midst of the recession, there was little [[venture capital]] available, with a total of $10 million for the entire industry being spent in all of 1975 (equivalent to ${{Inflation|US|10|1975}}&nbsp;million in {{Inflation/year|US}}). Someone from Exxon contacted the still-unnamed company,{{sfn|Faggin|Shima|Ungermann|2007|p=3}} and arranged a meeting that eventually led to them providing an initial $500,000 funding in June 1975 (equivalent to ${{Inflation|US|0.5|1975|r=1}}&nbsp;million in {{Inflation/year|US}}).{{sfn|Faggin|Shima|Ungermann|2007|p=8}}

With funding being discussed and a design to be built, Shima joined in February 1975.{{sfn|Faggin|Shima|Ungermann|2007|p=4}} Shima immediately set about producing a high-level design, adding several concepts of his own. In particular, he used his experience on [[NEC]] [[minicomputer]]s to add the concept of two sets of [[processor register]]s so they could quickly respond to [[interrupt]]s.{{sfn|Faggin|Shima|Ungermann|2007|p=2}}{{efn|This was a fairly common feature of minicomputer designs of the era, and found its way into a number of early microprocessors.}} Ungerman began the development of a series of related controllers and peripheral chips that would complement the design.{{sfn|Faggin|Shima|Ungermann|2007|p=5}}

Through this period, Shima developed a legendary reputation for being able to convert logic concepts into physical design in realtime; while discussing a proposed feature, he would often interrupt and state how much room that would take on the chip and veto its addition if it was too large.{{sfn|Faggin|Shima|Ungermann|2007|p=19}} The first pass at the design was complete by April 1975. Shima had completed a logic layout by the beginning of May. A second version of the logic design was issued on August 7 and the bus details by September 16. Tape-out was completed in November and converting the tape into a production mask required two more months.{{sfn|Faggin|Shima|Ungermann|2007|p=6}}

Faggin had already started looking for a production partner. By this time, Synertek and [[Mostek]] had both set up the depletion-mode production lines that could be used to produce the design. Having talked to Synertek previously, Faggin approached them first. However, the president of Synertek demanded that the company be given a [[second source]] license, allowing them to sell the design directly. Faggin thought this would mean they could never compete even if they set up their own lines, and the agreement fell through. He then turned to Mostek, who agreed to a term of exclusivity while Zilog got their lines set up, and was eventually given the second source agreement.{{sfn|Faggin|Shima|Ungermann|2007|p=7}}

After considering multiple names for the new company, and finding them so unmemorable they could not recall them even a day later, Faggin and Ungermann were kicking around ideas based on "integrated logic" when Ungermann said, "How about Zilog?" Faggin immediately agreed, stating they could say it was the "last word in integrated logic". When they met the next day and both immediately recalled it, the company had its name.{{sfn|Faggin|Shima|Ungermann|2007|p=17}}

=== Into production ===
The first samples were returned from Mostek on March 9, 1976.{{sfn|Faggin|Shima|Ungermann|2007|p=5}} By the end of the month, they had also completed an [[assembler (computing)|assembler]]-based [[microprocessor development board|development system]]. Some of the Z80 support and peripheral ICs were under development at this point, and some of them were launched during the following year. Among them were the Z80 CTC (counter/timer), Z80 DMA<ref>{{Cite web |title=Z80® DMA Direct Memory Access Controller |url=http://www.bitsavers.org/components/zilog/z80/Z80_DMA_Product_Specification_Feb80.pdf |access-date=January 8, 2024 |archive-date=February 5, 2024 |archive-url=https://web.archive.org/web/20240205070618/http://www.bitsavers.org/components/zilog/z80/Z80_DMA_Product_Specification_Feb80.pdf |url-status=live }}</ref> (direct memory access), Z80 DART (dual asynchronous receiver–transmitter), Z80 SIO (synchronous communication controller), and Z80 PIO (parallel input/output).

The Z80 was officially launched in July 1976.{{sfnp|Anderson|1994|p=51}} One of the first customers was a buyer who, unknown to Zilog, worked for NEC. At the time, the Japanese electronics companies were well known for taking US chip designs and producing them without a license. The Zilog team had worried about this, and Faggin had come up with the idea of adding transistors that would be subtly modified to operate differently than a visual inspection would suggest. Shima added six of these "traps" around the design. Sometime later, Shima was told by an engineer within NEC that the traps had delayed their copying efforts by six months.{{sfn|Faggin|Shima|Ungermann|2007|p=13}}

The launch allowed Faggin and Ungermann to approach Exxon looking for funding to build their own fab. The company agreed, and Zilog built a production line. This allowed them to capture about 60 to 70% of the total market for Z80 sales.{{sfn|Faggin|Shima|Ungermann|2007|p=9}} With their own line running, Mostek was given the go-ahead to start sales of their version, the MK3880, which provided a [[second source]] for customers that Intel lacked. At the time, a second source was considered extremely important as a start-up like Zilog might go out of business and leave potential customers stranded.{{sfn|Faggin|Shima|Ungermann|2007|p=4}}{{efn|Zilog manufactured the Z80 as well as most of their other products for many years until they sold their [[manufacturing plant]]s and become the "[[fabless]]" company they are today.}}

=== Comparison with the 8080 ===
Faggin designed the [[instruction set]] to be [[binary-code compatibility|binary compatible]] with the 8080{{sfnp|Anderson|1994|p=57}}<ref name="Brock 2003">{{Cite book |last=Brock |first=Gerald W. |url=https://archive.org/details/secondinformatio0000broc |title=The second information revolution |date=2003 |publisher=Harvard University Press |isbn=978-0-674-01178-6 |url-access=registration}}</ref> so that most 8080 code, notably the [[CP/M]] [[operating system]] and Intel's [[PL/M]] compiler for 8080 (as well as its generated code), would run unmodified on the new Z80 CPU. Masatoshi Shima designed most of the [[microarchitecture]] as well as the gate and transistor levels of the Z80 CPU, assisted by a small number of engineers and [[integrated circuit layout|layout]] people.<ref>{{Cite magazine |date=November 29, 1982 |title=History of the 8-bit: travelling far in a short time |url=https://books.google.com/books?id=HjAEAAAAMBAJ&pg=PA58 |url-status=live |archive-url=https://web.archive.org/web/20240105080752/https://books.google.com/books?id=HjAEAAAAMBAJ&pg=PA58 |archive-date=January 5, 2024 |magazine=[[InfoWorld]] |publisher=Popular Computing Inc. |location=Palo Alto, CA |pages=58–60 |volume=4 |issue=47 |issn=0199-6649}}</ref><ref>{{Cite magazine |last1=Faggin |first1=Federico |last2=Shima |first2=Masatoshi |author-link2=Masatoshi Shima |last3=Ungermann |first3=Ralph |date=August 19, 1976 |title=Z-80 chip set heralds third microprocessor generation |url=https://www.worldradiohistory.com/Archive-Electronics/70s/76/Electronics-1976-08-19.pdf#page=91 |url-status=live |archive-url=https://web.archive.org/web/20230131151012/https://worldradiohistory.com/Archive-Electronics/70s/76/Electronics-1976-08-19.pdf#page=91 |archive-date=January 31, 2023 |magazine=[[Electronics (magazine)|Electronics]] |publisher=[[McGraw Hill Education|McGraw–Hill]] |location=New York |pages=89–93 |volume=49 |issue=17}}</ref> CEO Federico Faggin was actually heavily involved in the chip layout work, together with two dedicated layout people. According to Faggin, he worked 80&nbsp;hours a week in order to meet the tight schedule given by the financial investors.{{sfn|Faggin|Shima|Ungermann|2007}}

The Z80 offered multiple improvements over the 8080:<ref name="Brock 2003" />
* An enhanced [[instruction set]] including:
** a more logical, comprehensible and readable system of assembler instruction [[Assembly language#Opcode mnemonics and extended mnemonics|mnemonics]]
** more flexible 16-bit data movement (load, or LD) instructions, crucially including the stack pointer SP
** more flexible addressing modes for input/output to external peripheral ports
** single-bit addressing of all registers and memory, including bit testing
** shifts/rotates on memory and registers other than the [[accumulator (computing)|accumulator]]
** improved and more accurate (than the previous 8080) [[binary-coded decimal|BCD]] arithmetic
** rotate instructions for BCD number strings in memory
** 16-bit subtraction and 8-bit negation
** [[program loop]]ing
** program counter (PC) relative jumps
** [[block move|block copy]], block [[input/output]] (I/O), and byte search instructions.{{sfnp|Ciarcia|1981|pp=31, 32}}
* An [[overflow flag]] with better support for signed 8- and 16-bit arithmetics.{{efn|Although the 8080 had 16-bit addition and 16-bit [[Increment and decrement operators|increment and decrement instructions]], it had no explicit 16-bit subtraction, and no overflow flag. The Z80 complemented this with the ADC&nbsp;HL,rr and SBC&nbsp;HL,rr instructions, which sets the new overflow flag accordingly. (The 8080-compatible ADD&nbsp;HL,rr does not.)}}
* New IX and IY [[index register]]s with instructions for direct ''base+[[Offset (computer science)|offset]]'' addressing
* A better [[interrupt]] system:
** A more automatic and general [[Interrupt vector|vectorized interrupt system]], ''mode&nbsp;2'', primarily intended for Zilog's line of counter/timers, DMA and communications controllers, as well as a fixed vector interrupt system, ''mode&nbsp;1'', for simple systems with minimal hardware (with ''mode&nbsp;0'' being the 8080-compatible mode).<ref name="Wai-Kai 2002">{{Cite book |last=Chen |first=Wai-Kai |title=The circuits and filters handbook |date=2002 |publisher=[[CRC Press]] |isbn=978-0-8493-0912-0 |page=1943 |quote=interrupt processing commences according to the interrupt method stipulated by the IM&nbsp;''i'', ''i''&nbsp;= 0, 1, or 2, instruction. If ''i''&nbsp;= 1, for direct method, the PC is loaded with 0038H. If ''i''&nbsp;= 0, for vectored method, the interrupting device has the opportunity to place the op-code for one byte. If ''i''&nbsp;= 2, for indirect vector method, the interrupting device must then place a byte. The Z80 then uses this byte where one of 128 interrupt vectors can be selected by the byte.}}</ref>
** A non-maskable interrupt (NMI), which can be used to respond to power-down situations or other high-priority events (and allowing a minimalistic Z80 system to easily implement a two-level interrupt scheme in ''mode&nbsp;1'').
* A complete duplicate [[register file]],<ref>{{Cite book |last=Mathur |title=Introduction to Microprocessors |date=1989 |publisher=Tata McGraw-Hill Publishing Company |isbn=978-0-07-460222-5 |page=111 |quote=The register architecture of the Z80 is more innovative than that of the 8085}}</ref> which could be quickly switched, to speed up response to [[interrupt]]s such as fast asynchronous event handlers or a [[multitasking (computing)|multitasking]] [[scheduler (computing)|dispatcher]]. Although they were not intended as extra registers for general code, they were nevertheless used that way in some applications.{{efn|Notably to simultaneously handle the 32-bit [[significand|mantissas]] of two [[operand]]s in the 40-bit [[floating-point arithmetic|floating-point]] format used in the [[ZX81]] home computer. They were also used in a similar fashion in some earlier but lesser known Z80-based computers, such as the Swedish [[ABC&nbsp;80]] and [[ABC&nbsp;800]].}}
* Less hardware required for [[power supply]], clock generation and interface to memory and I/O
* Single 5-volt power supply (the 8080 needed −5&nbsp;V, +5&nbsp;V, and +12&nbsp;V).
* Single-phase 5-volt clock (the 8080 needed a high-amplitude (9 to 12&nbsp;volts) non-overlapping [[two-phase clock]]).
* Built-in [[DRAM]] [[memory refresh|refresh]], which would otherwise require external circuitry, unless SRAM, more expensive and less dense (but faster), was used.{{efn|As this refresh does not need to transfer any data, just output sequential row-addresses, it occupies less than 1.5 T-states. The dedicated M1-signal (''machine cycle one'') in the Z80 can be used to allow memory chips the same amount of access time for instruction fetches as for data access, i.e almost 2 full T-states out of the 4T ''fetch'' cycle (as well as out of the 3T data ''read'' cycle). The Z80 could use memory with the same range of access times as the 8080 (or the 8086) at the same clock frequency. This long M1-signal (relative to the clock) also meant that the Z80 could employ about 4–5 times the internal frequency of a 6800, 6502 or similar using the same type of memory.}}
* Non-multiplexed buses (the 8080 had state signals multiplexed onto the data bus).
* A special reset that zeroes only the program counter, so that a single Z80 CPU could be used in a development system such as an [[in-circuit emulator]].<ref>{{Cite web |last=Brewer |first=Tony |title=Z80 Special Reset |website=[[GitHub]] |url=https://github.com/redcode/Z80/wiki/Z80-Special-Reset |access-date=April 27, 2024 |archive-date=April 27, 2024 |archive-url=https://web.archive.org/web/20240427180745/https://github.com/redcode/Z80/wiki/Z80-Special-Reset |url-status=live }}</ref>

=== Success in the market ===
The Z80 took over from the 8080 and its offspring, the [[Intel 8085|8085]], in the processor market<ref>{{Cite web |last=Adrian |first=Andre |date=June 4, 2011 |title=Z80, the 8-bit Number Cruncher |url=http://www.andreadrian.de/oldcpu/Z80_number_cruncher.html |url-status=live |archive-url=https://web.archive.org/web/20231126092639/http://www.andreadrian.de/oldcpu/Z80_number_cruncher.html |archive-date=November 26, 2023}}</ref> and became one of the most popular and widely used 8-bit CPUs.<ref name="Balch 2003"/><ref name="Seybold 1983" /> Some organizations such as [[BT Group|British Telecom]] remained loyal to the 8085 for embedded applications, owing to their familiarity with it and to its on-chip serial interface and interrupt architecture. Likewise, [[Zenith Data Systems]] paired the 8085 with the 16-bit [[Intel 8088]] in its first MS-DOS computer, the [[Zenith Z-100]], despite having previous experience with its pioneering Z80-based [[Zenith Z-89|Heathkit&nbsp;H89 and Zenith&nbsp;Z-89]] products. However, other computers were made integrating the Z80 with other CPUs: the Radio Shack [[TRS-80 Model II#Model 16|TRS-80 Model&nbsp;16]] with a [[Motorola 68000]], the [[Rainbow 100|DEC Rainbow]] with an 8088, and the [[Commodore 128]] with a [[MOS Technology 8502]].

Zilog was later producing a low-power Z80 suitable for the growing laptop computer market of the early 1980s. Intel produced a CMOS 8085 (80C85) used in battery-powered portable computers, such as the [[Kyocera]]-designed laptop from April 1983, also sold by Tandy (as [[TRS-80 Model 100]]), Olivetti, and NEC. In following years, however, CMOS versions of the Z80 (from both Zilog and Japanese manufacturers) would dominate this market as well, in products such as the [[Amstrad NC100]], [[Cambridge Z88]] and Tandy's own WP-2.

Perhaps a key to the initial success of the Z80 was the built-in DRAM refresh, at least in markets such as [[CP/M]] and other office and home computers. (Most Z80 [[embedded system]]s use [[Static random-access memory|static RAM]] that do not need refresh.) It may also have been its minimalistic two-level interrupt system, or conversely, its general multi-level daisy-chain interrupt system useful in servicing multiple Z80 IO chips. These features allowed systems to be built with less support hardware and simpler circuit board layouts.

However, others claim that its popularity was due to the duplicated registers that allowed fast context switches or more efficient processing of things like floating-point math compared to 8-bit CPUs with fewer registers. (The Z80 can keep several such numbers internally, using HL'HL, DE'DE and BC'BC as 32-bits registers, avoiding having to access them from slower RAM during computation.)<ref>{{Cite web |last=Adrian |first=Andre |date=June 4, 2011 |title=Z80, the 8-bit Number Cruncher: Z80 32-bit (long) add |url=http://www.andreadrian.de/oldcpu/Z80_number_cruncher.html#mozTocId228550 |url-status=live |archive-url=https://web.archive.org/web/20231126092639/http://www.andreadrian.de/oldcpu/Z80_number_cruncher.html#mozTocId228550 |archive-date=November 26, 2023}}</ref>

For the original [[NMOS logic|NMOS]] design, the specified upper clock-frequency limit increased successively from the introductory 2.5&nbsp;[[Hertz#SI multiples|MHz]], via the well known 4&nbsp;MHz (Z80A), up to 6&nbsp;MHz (Z80B) and 8&nbsp;MHz (Z80H).<ref>{{Cite book |title=Popular Computing |date=1983 |publisher=[[McGraw Hill Education|McGraw-Hill]] |page=15}}</ref><ref>{{Cite magazine |last=Markoff |first=John |date=October 18, 1982 |title=Zilog's speedy Z80 soups up 8-bit to 16-bit performance |url=https://books.google.com/books?id=CjAEAAAAMBAJ&pg=PA1 |url-status=live |archive-url=https://web.archive.org/web/20240105083032/https://books.google.dk/books?id=CjAEAAAAMBAJ&pg=PA1 |archive-date=January 5, 2024 |magazine=[[InfoWorld]] |publisher=Popular Computing, Inc. |location=Palo Alto, CA |page=1 |volume=4 |issue=41 |issn=0199-6649}}</ref> An NMOS version was produced as a 10&nbsp;MHz part beginning in the late 1980s. [[CMOS]] versions were developed with specified upper frequency limits ranging from 4&nbsp;MHz up to 20&nbsp;MHz for the version sold today. The CMOS versions allowed low-power standby with internal state retained, having no ''lower'' frequency limit.{{efn|Unlike the original nMOS version, which used dynamic latches and could not be stopped for more than a few thousand clock cycles.}} The fully compatible derivatives [[Hitachi HD64180|HD64180]]/[[Zilog Z180|Z180]]<ref>{{Cite book |title=Electronic design |date=1988 |publisher=Hayden |page=142 |quote=In addition to supporting the entire Z80 instruction set, the Z180}}</ref><ref>{{Cite web |last=Ganssle |first=Jack G. |date=1992 |title=The Z80 Lives! |url=http://www.z80.info/z80lives.htm |url-status=live |archive-url=https://web.archive.org/web/20231220144616/http://www.z80.info/z80lives.htm |archive-date=December 20, 2023 |quote=The designers picked an architecture compatible with the Z80, giving Z80 users a completely software compatible upgrade path. The 64180 processor runs every Z80 instruction exactly as a Z80 does}}</ref> and [[Zilog eZ80|eZ80]] are currently specified for up to 33&nbsp;MHz and 50&nbsp;MHz, respectively.