Editing Bitwise operation (section)

===Arithmetic shift===
{{main|Arithmetic shift}}
[[File:Rotate left logically.svg|thumb|150px|Left arithmetic shift]]
[[File:Rotate right arithmetically.svg|thumb|150px|Right arithmetic shift]]
In an ''arithmetic shift'' (sticky shift), the bits that are shifted out of either end are discarded. In a left arithmetic shift, zeros are shifted in on the right; in a right arithmetic shift, the [[sign bit]] (the MSB in two's complement) is shifted in on the left, thus preserving the sign of the operand.

This example uses an 8-bit register, interpreted as two's complement:

    00010111 (decimal +23) LEFT-SHIFT
 =  0010111'''0''' (decimal +46)

    10010111 (decimal −105) RIGHT-SHIFT
 =  '''1'''1001011 (decimal −53)

In the first case, the leftmost digit was shifted past the end of the register, and a new 0 was shifted into the rightmost position. In the second case, the rightmost 1 was shifted out (perhaps into the [[carry flag]]), and a new 1 was copied into the leftmost position, preserving the sign of the number. Multiple shifts are sometimes shortened to a single shift by some number of digits. For example:

    00010111 (decimal +23) LEFT-SHIFT-BY-TWO
 =  010111'''00''' (decimal +92)

A left arithmetic shift by ''n'' is equivalent to multiplying by 2<sup>''n''</sup> (provided the value does not [[arithmetic overflow|overflow]]), while a right arithmetic shift by ''n'' of a [[two's complement]] value is equivalent to taking the [[floor and ceiling functions|floor]] of division by 2<sup>''n''</sup>. If the binary number is treated as [[ones' complement]], then the same right-shift operation results in division by 2<sup>''n''</sup> and [[rounding#Round half towards zero|rounding toward zero]].