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Cyrix
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=== Cyrix M3 Jalapeno === This was a completely new core with a dual issue FPU, register renaming and out-of-order execution based on an 11-stage pipeline and 8-way associative, 8-way interleaved fully pipelined 256K L2 cache operating at core frequency. Jalapeño's new floating point unit had dual independent FPU/MMX units and included both a fully pipelined, independent x87 adder and x87 multiplier. The Jalapeño design facilitated close integration between the core and the advanced 3D graphics engine, which was one of the first graphics subsystems to utilize a dual-issue FPU. The dual FPUs supported execution of both MMX and 3DNow instructions. Jalepeno had an on-die memory controller based on RAMBUS technology capable of 3.2 GB/s to reduce memory latency and an integrated on-board 3D graphics which purportedly could process up to 3 million polygons per second and 266 million pixels per second based on a 233 Mhz clock. The on-die graphics had access to the L2 cache of the CPU to store textures. The design's initial clock speed target was 600-800 Mhz with headroom to scale to 1 Ghz and beyond. It was due to begin production in Q4 1999 and launch in the year 2000 on a 0.18 micron process with a die size of 110–120 mm<sup>2</sup>.<ref>{{cite web |url= https://www.edn.com/microprocessor-forum-cyrix-spices-up-pc-with-jalapeno/ |title=Microprocessor Forum: Cyrix spices up PC with Jalapeño |author=<!--Staff writer(s); no by-line.--> |work=[[EDN (magazine)|EDN]] |date=October 14, 1998 |access-date=May 26, 2020}}</ref><ref>{{cite web |url= http://www.cpushack.com/CIC/announce/1998/M3.annc.html |author=<!--Staff writer(s); no by-line.--> |title=Press Release: Cyrix Unveils Jalapeño Core Architecture – Next generation processor delivers cutting-edge performance, advances integrated platform strategy |publisher=Cyrix |date=October 13, 1998 |via=CPUShack Museum |access-date=May 26, 2020}}</ref> It is unclear how advanced development on this core was when Cyrix was acquired from National Semiconductor by [[VIA Technologies]] and the project discontinued. VIA did, however, continue producing late-generation Cyrix chips under the name VIA Cyrix III (also known as Cyrix 3).<ref name="TweakTown" />
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