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DEC PRISM
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==Further reading== * Bhandarkar, Dileep P. (1995). ''Alpha Architecture and Implementations''. Digital Press. * Bhandarkar, D. et al. (1990. [https://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=63667 "High performance issue orientated architecture"]. ''Proceedings of Compcon Spring '90'', pp. 153–160. * Conrad, R. et al. (1989). [https://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=48185 "A 50 MIPS (peak) 32/64 b microprocessor"]. ''ISSCC Digest of Technical Papers'', pp. 76–77. {{Digital Equipment Corporation}} {{RISC-based processor architectures}} {{CPU technologies}} [[Category:Instruction set architectures]] [[Category:Information technology projects]]
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