Editing Digital signal processor (section)

==History==
[[File:TRW 1010J 1.jpg|thumb|TRW TDC1010 multiplier-accumulator]]
===Development===
In 1976, Richard Wiggins proposed the [[Speak & Spell (toy)|Speak & Spell]] concept to Paul Breedlove, Larry Brantingham, and Gene Frantz at [[Texas Instruments]]' Dallas research facility. Two years later in 1978, they produced the first Speak & Spell, with the technological centerpiece being the [[TMS5100]],<ref>{{cite web |publisher=IEEE |work=IEEE Milestones |title=Speak & Spell, the First Use of a Digital Signal Processing IC for Speech Generation, 1978 |url=http://www.ieeeghn.org/wiki/index.php/Milestones:Speak_%26_Spell,_the_First_Use_of_a_Digital_Signal_Processing_IC_for_Speech_Generation,_1978 |access-date=2012-03-02}}</ref> the industry's first digital signal processor. It also set other milestones, being the first chip to use linear predictive coding to perform [[speech synthesis]].<ref>{{cite web |author=Bogdanowicz, A. |title=IEEE Milestones Honor Three |url=http://theinstitute.ieee.org/technology-focus/technology-history/ieee-milestones-honor-four476 |work=The Institute |publisher=IEEE |date=2009-10-06 |access-date=2012-03-02 |archive-url=https://web.archive.org/web/20160304200210/http://theinstitute.ieee.org/technology-focus/technology-history/ieee-milestones-honor-four476 |archive-date=2016-03-04 |url-status=dead}}</ref> The chip was made possible with a [[10 μm process|7 μm]] [[PMOS logic|PMOS]] [[semiconductor device fabrication|fabrication process]].<ref>{{cite book |last1=Khan |first1=Gul N. |last2=Iniewski |first2=Krzysztof |title=Embedded and Networking Systems: Design, Software, and Implementation |date=2017 |publisher=[[CRC Press]] |isbn=9781351831567 |page=2 |url=https://books.google.com/books?id=vx8uDwAAQBAJ&pg=PR14}}</ref>

In 1978, [[American Microsystems]] (AMI) released the S2811.<ref name="computerhistory1979"/><ref name="edn"/> The AMI S2811 "signal processing peripheral", like many later DSPs, has a hardware multiplier that enables it to do [[multiply–accumulate operation]] in a single instruction.<ref>Alberto Luis Andres. [http://scholarworks.csun.edu/bitstream/handle/10211.3/126902/AndresAlberto1983.pdf "Digital Graphic Audio Equalizer"]. p. 48.</ref> The S2281 was the first [[integrated circuit]] chip specifically designed as a DSP, and fabricated using vertical metal oxide semiconductor ([[VMOS]], V-groove MOS), a technology that had previously not been mass-produced.<ref name="edn"/> It was designed as a microprocessor peripheral, for the [[Motorola 6800]],<ref name="computerhistory1979"/> and it had to be initialized by the host. The S2811 was not successful in the market.

In 1979, [[Intel]] released the [[Intel 2920|2920]] as an "analog signal processor".<ref>{{Cite web |url=https://www.intel.com/Assets/PDF/General/35yrs.pdf#page=17 |title=Archived copy |access-date=2019-02-17 |archive-date=2020-09-29 |archive-url=https://web.archive.org/web/20200929045706/https://www.intel.com/Assets/PDF/General/35yrs.pdf#page=17 |url-status=dead}}</ref> It had an on-chip ADC/DAC with an internal signal processor, but it didn't have a hardware multiplier and was not successful in the market.

In 1980, the first stand-alone, complete DSPs – [[Nippon Electric Corporation]]'s [[NEC μPD7720]] based on the modified Harvard architecture<ref>{{cite web |url=https://www.datasheetarchive.com/datasheet?id=03a93172fcfb5d333133fa8d7fb1d6fa7cf492&type=M&term=upd7720 |title=NEC Electronics Inc. μPD77C20A, 7720A, 77P20 Digital Signal Processors |page=1 |accessdate=2023-11-13}}</ref> and [[AT&T Corporation|AT&T]]'s [[AT&T DSP1|DSP1]] – were presented at the [[International Solid-State Circuits Conference]] '80. Both processors were inspired by the research in [[public switched telephone network]] (PSTN) [[telecommunications]]. The μPD7720, introduced for [[voiceband]] applications, was one of the most commercially successful early DSPs.<ref name="computerhistory1979"/>

The Altamira DX-1 was another early DSP, utilizing quad integer pipelines with delayed branches and branch prediction.{{citation needed|reason=no mention on the web, except of WP text copies and translations|date=December 2014}}

Another DSP produced by Texas Instruments (TI), the [[Texas Instruments TMS320|TMS32010]] presented in 1983, proved to be an even bigger success. It was based on the Harvard architecture, and so had separate instruction and data memory. It already had a special instruction set, with instructions like load-and-accumulate or multiply-and-accumulate. It could work on 16-bit numbers and needed 390&nbsp;ns for a multiply–add operation. TI is now the market leader in general-purpose DSPs.

About five years later, the second generation of DSPs began to spread. They had 3 memories for storing two operands simultaneously and included hardware to accelerate [[tight loop]]s; they also had an addressing unit capable of loop-addressing. Some of them operated on 24-bit variables and a typical model only required about 21&nbsp;ns for a MAC. Members of this generation were for example the AT&T DSP16A or the [[Motorola 56000]].

The main improvement in the third generation was the appearance of application-specific units and instructions in the data path, or sometimes as coprocessors. These units allowed direct hardware acceleration of very specific but complex mathematical problems, like the Fourier-transform or matrix operations. Some chips, like the Motorola MC68356, even included more than one processor core to work in parallel. Other DSPs from 1995 are the TI TMS320C541 or the TMS 320C80.

The fourth generation is best characterized by the changes in the instruction set and the instruction encoding/decoding. SIMD extensions were added, and VLIW and the superscalar architecture appeared. As always, the clock-speeds have increased; a 3&nbsp;ns MAC now became possible.