Editing IBM Future Systems project (section)

=== Processor ===
Another principle was the use of very high-level complex instructions to be implemented in [[microcode]]. As an example, one of the instructions, <code>CreateEncapsulatedModule</code>, was a complete [[linker (computing)|linkage editor.]] Other instructions were designed to support the internal data structures and operations of programming languages such as [[FORTRAN]], [[COBOL]], and [[PL/I]]. In effect, FS was designed to be the ultimate complex instruction set computer ([[Complex instruction set computer|CISC]]).<ref name=hansen/>

Another way of presenting the same concept was that the entire collection of functions previously implemented as hardware, [[operating system]] software, [[data base]] software and more would now be considered as making up one integrated system, with each and every elementary function implemented in one of many layers including circuitry, [[microcode]], and conventional [[software]]. More than one layer of microcode and code were contemplated, sometimes referred to as [[picocode]] or [[millicode]]. 
Depending on the people one was talking to, the very notion of a "machine" therefore ranged between those functions which were implemented as circuitry (for the hardware specialists) to the complete set of functions offered to users, irrespective of their implementation (for the systems architects).

The overall design also called for a "universal controller" to handle primarily input-output operations outside of the main processor. That universal controller would have a very limited instruction set, restricted to those operations required for I/O, pioneering the concept of a reduced instruction set computer (RISC).

Meanwhile, [[John Cocke (computer scientist)|John Cocke]], one of the chief designers of early IBM computers, began a research project to design the first reduced instruction set computer ([[RISC]]).{{Citation needed |date=August 2013}}  In the long run, the [[IBM 801]] RISC architecture, which eventually evolved into IBM's [[IBM POWER architecture|POWER]], [[PowerPC]], and [[Power ISA|Power]] architectures, proved to be vastly cheaper to implement and capable of achieving much higher clock rate.