Editing Magnetoresistive RAM (section)

==History==
{{Prose|section|date=March 2019}}
[[File:200mm 1&nbsp;Mb MRAM - D60 Symposium - Defense Advanced Research Projects Agency - DSC05568.jpg|thumb|right|First 200mm 1&nbsp;Mb MRAM wafer, fabricated by [[Motorola]], 2001]]
* 1955&nbsp;— [[Magnetic-core memory]] had the same reading writing principle as MRAM
* 1984&nbsp;— Arthur V. Pohm and James M. Daughton, while working for [[Honeywell]], developed the first magnetoresistance memory devices.<ref name=Daughton>{{Cite web|url=https://www.nve.com/Downloads/mram.pdf|title=James Daughton, Magnetoresistive Random Access Memory (MRAM)}}</ref><ref name=everspin>{{Cite web|url=https://www.everspin.com/sites/default/files/pressdocs/JPL_MRAM_Study.pdf|title=NASA JPL, MRAM Technology Status}}</ref>
* 1988&nbsp;— European scientists ([[Albert Fert]] and [[Peter Grünberg]]) discovered the "[[giant magnetoresistive effect]]" in thin-film structures.<ref>{{Cite web | url=http://www.research.ibm.com/research/gmr.html | archive-url=https://web.archive.org/web/20120111051257/http://www.research.ibm.com/research/gmr.html | url-status=dead | archive-date=2012-01-11 | title=GMR: A Giant Leap for IBM Research}}</ref>
* 1989&nbsp;— Pohm and Daughton left Honeywell to form Nonvolatile Electronics, Inc. (later renamed to NVE Corp.) sublicensing the MRAM technology they have created.<ref name=Daughton />
* 1995&nbsp;— [[Motorola]] (later to become [[Freescale Semiconductor]], and subsequently [[NXP Semiconductors]]) initiates work on MRAM development
* 1996&nbsp;— [[Spin-transfer torque|Spin torque transfer]] is proposed<ref>{{Cite journal|last=L Berger|date=October 1996|title=Emission of spin waves by a magnetic multilayer traversed by a current|journal=Physical Review B|volume=54|pages=9353–8|doi=10.1103/physrevb.54.9353|pmid=9984672|issue=13|bibcode=1996PhRvB..54.9353B}}</ref><ref>{{Cite journal|date=October 1996|title=Current-driven excitation of magnetic multilayers|journal=Journal of Magnetism and Magnetic Materials|volume=159|issue=1–2|pages=L1–L7|doi=10.1016/0304-8853(96)00062-5| last1 = Slonczewski | first1 = J.C.|bibcode=1996JMMM..159L...1S}}</ref>
* 1997&nbsp;— Sony published the first Japan Patent Application for S.P.I.N.O.R. (Spin Polarized Injection Non-Volatile Orthogonal Read/Write RAM), a forerunner of STT RAM.<ref>{{cite web |last1=Maiken |first1=Eric |title=Nonvolatile random access memory device |url=https://patents.google.com/patent/JP4066477B2/en?inventor=%E3%83%9E%E3%82%A4%E3%82%B1%E3%83%B3+%E3%82%A8%E3%83%AA%E3%83%83%E3%82%AF |website=patents.google.com |publisher=Japan Patent Office |access-date=20 May 2023}}</ref>
* 1998&nbsp;— Motorola develops 256{{nbsp}}Kb MRAM test chip.<ref>{{Citation|title=Magnetic Random Access Memory Devices|date=October 2003|author=N.P. Vasil'eva|journal=Automation and Remote Control|volume=64|issue=9|pages=1369–85|doi=10.1023/a:1026039700433|s2cid=195291447}}</ref>
* 2000&nbsp;— IBM and Infineon established a joint MRAM development program.
* 2000&nbsp;— Spintec laboratory's first [[Spin-Torque Transfer]] patent.
* 2002
** NVE announces technology exchange with Cypress Semiconductor.
** Toggle patent granted to Motorola<ref>{{cite patent|country=United States|number=6633498|title=Magnetoresistive random access memory with reduced switching field|fdate=June 18, 2002|inventor=Engel; Bradley N., Janesky; Jason Allen, Rizzo; Nicholas D.}}</ref>
* 2003&nbsp;— A 128&nbsp;kbit MRAM chip was introduced, manufactured with a 180&nbsp;nm lithographic process
* 2004
** June&nbsp;— [[Infineon]] unveiled a 16-Mbit prototype, manufactured with a 180&nbsp;nm lithographic process
** September&nbsp;— MRAM becomes a standard product offering at Freescale.
** October&nbsp;— Taiwan developers of MRAM tape out 1&nbsp;Mbit parts at [[TSMC]].
** October&nbsp;— Micron drops MRAM, mulls other memories.
** December&nbsp;— TSMC, [[NEC]] and [[Toshiba]] describe novel MRAM cells.
** December&nbsp;— [[Renesas Technology]] promotes a high performance, high-reliability MRAM technology.
** Spintech laboratory's first observation of [[Thermal Assisted Switching]] (TAS) as MRAM approach.
** [[Crocus Technology]] is founded; the company is a developer of second-generation MRAM
* 2005
** January&nbsp;— [[Cypress Semiconductor]] samples MRAM, using NVE IP.
** March&nbsp;— Cypress to Sell MRAM Subsidiary.
** June&nbsp;— Honeywell posts data sheet for 1-Mbit rad-hard MRAM using a 150&nbsp;nm lithographic process.
** August&nbsp;— MRAM record: memory cell runs at 2&nbsp;GHz.
** November&nbsp;— Renesas Technology and [[Grandis (company)|Grandis]] collaborate on development of 65&nbsp;nm MRAM employing [[spin torque transfer]] (STT).
** November&nbsp;— NVE receives an [[SBIR]] grant to research cryptographic tamper-responsive memory.<ref>{{cite web|url=https://www.nsf.gov/awardsearch/showAward?AWD_ID=0539675|title=NSF Award Search: Award#0539675 - SBIR Phase I: Zero-Remanence Tamper-Responsive Cryptokey Memory|website=www.nsf.gov}}</ref>
** December&nbsp;— [[Sony]] announced Spin-RAM, the first lab-produced spin-torque-transfer MRAM, which utilizes a spin-polarized current through the tunneling magnetoresistance layer to write data. This method consumes less power and is more scalable than conventional MRAM. With further advances in materials, this process should allow for densities higher than those possible in DRAM.
** December&nbsp;— [[Freescale|Freescale Semiconductor]] Inc. demonstrates an MRAM that uses magnesium oxide, rather than an aluminum oxide, allowing for a thinner insulating tunnel barrier and improved bit resistance during the write cycle, thereby reducing the required write current.
** Spintec laboratory gives Crocus Technology exclusive license on its patents.
* 2006
** February&nbsp;— [[Toshiba]] and NEC announced a 16&nbsp;Mbit MRAM chip with a new "power-forking" design. It achieves a transfer rate of 200&nbsp;Mbit/s, with a 34 ns cycle time, the best performance of any MRAM chip. It also boasts the smallest physical size in its class&nbsp;— 78.5 square millimeters&nbsp;— and the low voltage requirement of 1.8 volts.<ref name="NEC PR 2006-02-07">{{cite press release |publisher=NEC Corporation |date=2006-02-07 |url=http://www.nec.co.jp/press/en/0602/0702.html |title=Toshiba and NEC Develop World's Fastest, Highest Density MRAM |access-date = 2006-07-10}}</ref>
** July&nbsp;— On July 10, Austin Texas&nbsp;— Freescale Semiconductor begins marketing a 4-Mbit MRAM chip, which sells for approximately $25.00 per chip.<ref name="Freescale PR 2006-07-10">{{cite press release |publisher=Freescale Semiconductor |date=2006-07-10 |url=http://media.freescale.com/phoenix.zhtml?c=196520&p=irol-newsArticle&ID=880030 |title=Freescale Leads Industry in Commercializing MRAM Technology |access-date=2006-07-10 |url-status=dead |archive-url=https://web.archive.org/web/20071013124650/http://media.freescale.com/phoenix.zhtml?c=196520&p=irol-newsArticle&ID=880030 |archive-date=2007-10-13 }}</ref><ref>{{Cite news|url=http://eetimes.com/electronics-news/4062196/MRAM-debut-cues-memory-transition|title=MRAM debut cues memory transition|last=Lammers|first=David|date=October 7, 2006|publisher=EE Times}}</ref>
* 2007
** R&D moving to [[spin-transfer torque|spin transfer torque]] RAM (SPRAM)
** February&nbsp;— Tohoku University and Hitachi developed a prototype 2-Mbit non-volatile RAM chip employing spin-transfer torque switching.<ref name="Hitachi PR 2007-02-13">{{cite press release |publisher=Hitachi Ltd. |date=2007-02-13 |url=http://www.hitachi.com/New/cnews/070213.html |title=Prototype 2 Mbit Non-Volatile RAM Chip Employing Spin-Transfer Torque Writing Method |access-date = 2007-02-13}}</ref>
** August&nbsp;— "IBM, TDK Partner In Magnetic Memory Research on Spin Transfer Torque Switching" IBM and TDK to lower the cost and boost performance of MRAM to hopefully release a product to market.<ref name="IBM PR 2007-08-19">{{cite press release | publisher=IBM |date=2007-08-19|url=http://www-03.ibm.com/press/us/en/pressrelease/22180.wss |archive-url=https://web.archive.org/web/20071013122724/http://www-03.ibm.com/press/us/en/pressrelease/22180.wss |url-status=dead |archive-date=October 13, 2007 |title=IBM and TDK Launch Joint Research & Development Project for Advanced MRAM |access-date = 2007-08-22}}</ref>
** November&nbsp;— Toshiba applied and proved the spin-transfer torque switching with perpendicular magnetic anisotropy MTJ device.<ref name="Toshiba PR 2007-11-6">{{cite press release |publisher=Toshiba Corporation |date=2007-11-06 |url=http://www.toshiba.co.jp/about/press/2007_11/pr0601.htm |title=Toshiba develops new MRAM device that opens the way to giga-bits capacity |access-date = 2007-11-06}}</ref>
** November&nbsp;— NEC develops world's fastest SRAM-compatible MRAM with operation speed of 250&nbsp;MHz.<ref name="NEC PR 2007-11-30">{{cite press release |publisher=NEC Corporation |date=2007-11-30 |url=http://www.nec.co.jp/press/en/0711/3001.html |title=NEC Develops World's Fastest SRAM-Compatible MRAM With Operation Speed of 250MHz. |access-date = 2007-12-01}}</ref>
* 2008
** Japanese satellite, SpriteSat, to use Freescale MRAM to replace SRAM and FLASH components<ref name="sciam.com">{{cite web|url=https://www.scientificamerican.com/article/japanese-satellite-mram-freescale/|title=Japanese Satellite First to Use Magnetic Memory|first=Larry|last=Greenemeier|website=Scientific American}}</ref>
** June&nbsp;— [[Samsung]] and [[Hynix]] become partner on STT-MRAM<ref>{{Cite web |url=http://www.eetasia.com/ART_8800531562_480200_NT_cf6338bb.HTM |title=Samsung, Hynix partner on STT-MRAM |access-date=2008-10-01 |archive-url=https://web.archive.org/web/20081112072440/http://www.eetasia.com/ART_8800531562_480200_NT_cf6338bb.HTM |archive-date=2008-11-12 |url-status=dead }}</ref>
** June&nbsp;— Freescale spins off MRAM operations as new company Everspin<ref>{{Cite press release |url=http://everspin.com/PDF/press/2008_june9_Everspin%20Release.pdf |date=29 June 2008 |title=Freescale launches independent company to accelerate MRAM business |archive-url=https://web.archive.org/web/20120726215228/http://everspin.com/PDF/press/2008_june9_Everspin%20Release.pdf|archive-date=2012-07-26}}</ref><ref>{{Cite news|url=https://www.nytimes.com/2008/06/09/technology/09freescale.html?_r=3&scp=2&sq=MRAM&st=cse&oref=slogin&oref=slogin|title=Chip Maker to Announce It Will Spin Off Memory Unit|last=de la Merced|first=Michael J.|date=June 9, 2008|work=The New York Times}}</ref>
** August&nbsp;— Scientists in Germany have developed next-generation MRAM that is said to operate as fast as fundamental performance limits allow, with write cycles under 1 nanosecond.
** November&nbsp;— [[Everspin Technologies|Everspin]] announces [[Ball grid array|BGA]] packages, product family from 256&nbsp;Kb to 4&nbsp;Mb<ref>{{Cite news|url=http://eetimes.com/electronics-products/memory-products/4108834/Freescale-s-MRAM-spin-off-rolls-new-devices|title=Freescale's MRAM spin-off rolls new devices|last=LaPedus|first=Mark|date=November 13, 2008|work=EE Times}}</ref>
* 2009
** June&nbsp;— Hitachi and Tohoku University demonstrated a 32-Mbit spin-transfer torque RAM (SPRAM).<ref>{{cite conference |last1=Takemura |first1=R. |last2=Kawahara |first2=T. |last3=Miura |first3=K. |last4=Yamamoto |first4=H. |last5=Hayakawa |first5=J. |last6=Matsuzaki |first6=N. |last7=Ono |first7=K. |last8=Yamanouchi |first8=M. |last9=Ito |first9=K. |last10=Takahashi |first10=H. |last11=Ikeda |first11=S. |title=32-mb 2t1r spram with localized bi-directional write driver and '1'/'0'dual-array equalized reference cell |book-title=2009 Symposium on VLSI Circuits |publisher=IEEE |date=2009 |isbn=978-1-4244-3307-0 |pages=84–85 |url=https://ieeexplore.ieee.org/document/5205284}}</ref>
** June&nbsp;— [[Crocus Technology]] and Tower Semiconductor announce deal to port Crocus' MRAM process technology to Tower's manufacturing environment<ref>{{Cite web|url=https://crocus-technology.com/news/|archive-url=https://web.archive.org/web/20100422232721/http://www.crocus-technology.com/pr-06-18-09.html|url-status=dead|title=News &#124; Crocus Technology|archive-date=April 22, 2010}}</ref>
** November&nbsp;— [[Everspin Technologies|Everspin]] releases SPI MRAM product family<ref>{{Cite news|url=http://eetimes.com/electronics-news/4085891/MRAM-chips-go-serial-in-smart-meters|title=MRAM chips go serial in smart meters|last=Johnson|first=R Colin|date=November 16, 2009|work=EE Times}}</ref> and ships first embedded MRAM samples
* 2010
** April&nbsp;— Everspin releases 16&nbsp;Mb density<ref>{{Cite news|url=http://www.edn.com/blog/Practical_Chip_Design/37503-Everspin_MRAM_reaches_16_Mbits_looks_toward_embedded_use_in_SoCs.php|title=Everspin MRAM reaches 16 Mbits, looks toward embedded use in SoCs|date=April 19, 2010|publisher=EDN|author=Ron Wilson|url-status=dead|archive-url=https://archive.today/20130121230927/http://www.edn.com/blog/Practical_Chip_Design/37503-Everspin_MRAM_reaches_16_Mbits_looks_toward_embedded_use_in_SoCs.php|archive-date=January 21, 2013}}</ref><ref>{{Cite news|url=http://www.electronicsweekly.com/blogs/david-manners-semiconductor-blog/2010/04/everspin-launches-16mbit-mram.html|title=Everspin Launches 16Mbit MRAM, Volume In July|date=April 20, 2010|publisher=Electronics Weekly|author=David Manners}}</ref>
** June&nbsp;— Hitachi and Tohoku Univ announce Multi-level SPRAM<ref>{{cite web|author=Motoyuki Ooishi|author2=Nikkei Electronics |url=http://techon.nikkeibp.co.jp/english/NEWS_EN/20100622/183658/ |title=[VLSI&#93; Hitachi, Tohoku Univ Announce Multi-level Cell SPRAM&nbsp;— Tech-On! |publisher=Techon.nikkeibp.co.jp |date=2010-06-23 |access-date=2014-01-09}}</ref>
* 2011
** March&nbsp;— PTB, Germany, announces below 500 ps (2&nbsp;Gbit/s) write cycle<ref>{{cite press release|title=Extremely fast MRAM data storage within reach|date=2011-03-08|url=http://www.ptb.de/en/aktuelles/archiv/presseinfos/pi2011/pitext/pi110308.html|publisher=PTB|access-date=2011-03-09}}</ref>
* 2012
** November&nbsp;— Chandler, Arizona, USA, Everspin debuts 64&nbsp;Mb ST-MRAM on a [[90 nm process]].<ref>{{Cite news|url=http://semiaccurate.com/2012/11/16/everspin-makes-st-mram-a-reality/|title=Everspin makes ST-MRAM a reality, LSI AIS 2012: Non-volatile memory with DDR3 speeds|date=November 16, 2012|publisher=SemiAccurate.com|author=Charlie Demerjian}}</ref><ref>{{Cite web|url=http://www.everspin.com/PDF/ST-MRAM_Press_Release.pdf|archive-url=https://web.archive.org/web/20130330004801/http://everspin.com/PDF/ST-MRAM_Press_Release.pdf|url-status=dead|title=Everspin press release|archive-date=March 30, 2013}}</ref>
** December&nbsp;— A team from [[University of California, Los Angeles]] presents voltage-controlled MRAM at IEEE [[International Electron Devices Meeting]].<ref>{{cite web|url=http://www.eetimes.com/document.asp?doc_id=1280508|website=EE Times|title=Voltage-controlled MRAM: Status, challenges and prospects}}</ref>
* 2013
** November&nbsp;— [[Buffalo Technology]] and Everspin announce a new industrial SATA III SSD that incorporates Everspin's Spin-Torque MRAM (ST-MRAM) as cache memory.<ref>{{cite web|url=http://www.businesswire.com/news/home/20131118005368/en/Everspin-ST-MRAM-Incorporated-Cache-Memory-Buffalo-Memory |title=Everspin ST-MRAM Incorporated for Cache Memory Into Buffalo Memory SSD |publisher=Business Wire |date=2013-11-18 |access-date=2014-01-09}}</ref>
* 2014
** January&nbsp;— Researchers announce the ability to control the magnetic properties of core/shell antiferromagnetic [[nanoparticle]]s using only temperature and magnetic field changes.<ref>{{cite web|url=http://www.gizmag.com/magnetic-nanoparticles-digital-storage-amf-uab/30299/ |title=Magnetic nanoparticles breakthrough could help shrink digital storage |date=8 January 2014 |publisher=Gizmag.com |access-date=2014-01-09}}</ref>
** October — Everspin partners with [[GlobalFoundries]] to produce ST-MRAM on 300&nbsp;mm wafers.<ref>{{Cite press release|date=2014-10-27|title=Everspin and GLOBALFOUNDRIES Partner to Supply Fully Processed 300mm CMOS Wafers with Everspin's ST-MRAM Technology|url=https://www.globalfoundries.com/news-events/press-releases/everspin-and-globalfoundries-partner-to-supply-fully-processed-300mm-cmos-wafers-with-everspins-st-mram-technology|access-date=2020-08-22|website=GLOBALFOUNDRIES|language=en|archive-date=2020-09-24|archive-url=https://web.archive.org/web/20200924185045/https://www.globalfoundries.com/news-events/press-releases/everspin-and-globalfoundries-partner-to-supply-fully-processed-300mm-cmos-wafers-with-everspins-st-mram-technology|url-status=dead}}</ref>
* 2016
** April&nbsp;— Samsung's semiconductor chief Kim Ki-nam says Samsung is developing an MRAM technology that "will be ready soon".<ref>
{{cite web|url=https://www.koreatimes.co.kr/www/news/tech/2016/04/133_203023.html|title=Cheil Worldwide acquires Founded|last1=Kim |first1=Yoo-chul |date=20 April 2016 |website=Koreatimes.co.kr |publisher=Korea Times |access-date=27 June 2016|quote='Yes, Samsung will commercialize MRAMs and ReRAMs according to our own schedule. We are on our way and will be ready soon,' Kim told reporters.
}}</ref>
** July&nbsp;— IBM and Samsung report an MRAM device capable of scaling down to 11&nbsp;nm with a switching current of 7.5 microamps at 10 ns.<ref>{{Cite web|url=https://www.ibm.com/blogs/research/2016/07/ibm-celebrates-20-years-spin-torque-mram-scaling-11-nanometers/|title=Researchers celebrate 20th anniversary of IBM's invention of Spin Torque MRAM by demonstrating scalability for the next decade&nbsp;— IBM Blog Research|date=2016-07-07|website=IBM Blog Research|language=en-US|access-date=2016-07-11}}</ref>
** August&nbsp;— Everspin announced it was shipping samples of the industry's first 256&nbsp;Mb ST-MRAM to customers.<ref>{{Cite web|url=http://www.thessdreview.com/daily-news/everspin-announces-sampling-industrys-first-256mb-perpendicular-spin-torque-mram-customers-production-preparations-underway/|title=Everspin Announces Sampling of Industry's First 256Mb Perpendicular Spin Torque MRAM to Customers|last=Strong|first=Scott|date=August 5, 1026|website=The SSD Review}}</ref>
** October&nbsp;— [[Avalanche Technology]] partners with [[Sony Semiconductor Manufacturing]] to manufacture STT-MRAM on 300&nbsp;mm wafers, based on "a variety of manufacturing nodes".<ref>{{Cite web|date=2016-10-31|title=Sony revealed as MRAM foundry for Avalanche|url=https://www.eenewsanalog.com/news/sony-revealed-mram-foundry-avalanche|access-date=2020-08-22|website=eeNews Analog|language=en}}</ref>
** December&nbsp;— [[Inston]] and [[Toshiba]] independently present results on voltage-controlled MRAM at [[International Electron Devices Meeting]].<ref>{{cite web|url=http://www.analog-eetimes.com/news/iedm-magnetic-ram-debuts-28nm-embedded-nvm|website=EE Times|title=IEDM: Magnetic RAM debuts as 28nm embedded NVM &#124; EETE Analog|access-date=2017-03-03|archive-url=https://web.archive.org/web/20170303130002/http://www.analog-eetimes.com/news/iedm-magnetic-ram-debuts-28nm-embedded-nvm|archive-date=2017-03-03|url-status=dead}}</ref>
* 2019
** January — Everspin starts shipping samples of 28&nbsp;nm 1&nbsp;Gb STT-MRAM chips.<ref>{{Cite web|url=https://www.mram-info.com/everspin-starts-ship-customer-samples-its-28nm-1gb-stt-mram-chips|title=Everspin starts to ship customer samples of its 28nm 1Gb STT-MRAM chips {{!}} MRAM-Info|website=www.mram-info.com|access-date=2019-12-03}}</ref>
** March — Samsung commence commercial production of its first embedded STT-MRAM based on a 28&nbsp;nm process.<ref>{{Cite news|title=Samsung Says It's Shipping 28-nm Embedded MRAM|work=EE Times|url=https://www.eetimes.com/samsung-says-its-shipping-28-nm-embedded-mram/}}</ref>
** May — Avalanche partners with [[United Microelectronics Corporation]] to jointly develop and produce embedded MRAM based on the latter's 28&nbsp;nm CMOS manufacturing process.<ref>{{Cite web|date=2018-08-06|title=UMC and Avalanche Technology Partner for MRAM Development and 28nm Production|url=http://www.avalanche-technology.com/umc-and-avalanche-technology-partner-for-mram-development-and-28nm-production/|access-date=2020-08-22|website=Avalanche Technology|language=en-US}}</ref>
* 2020
** December — IBM announces a 14&nbsp;nm MRAM node.<ref>{{Cite web|date=2020-12-15|title=IBM to reveal the world's first 14nm STT-MRAM node|url=https://www.mram-info.com/ibm-reveal-worlds-first-14nm-stt-mram-node|access-date=2020-12-17|language=en-US}}</ref>
* 2021
** May — [[TSMC]] revealed a [[wikt:roadmap|roadmap]] for developing the eMRAM technology at 12/14&nbsp;nm node as an offering to replace eFLASH.<ref>{{Cite web|title=TSMC shows its eMRAM technology roadmap {{!}} MRAM-Info|url=https://www.mram-info.com/tsmc-shows-its-emram-technology-roadmap|access-date=2021-05-16|website=www.mram-info.com}}</ref>
** November — [[Taiwan Semiconductor Research Institute]] announced the development of a SOT-MRAM device.<ref>{{cite web |last1=Chia-nan |first1=Lin |title=Local researchers make advanced MRAM device |url=https://www.taipeitimes.com/News/taiwan/archives/2021/11/10/2003767639 |website=www.taipeitimes.com |publisher=Taipei Times |access-date=9 November 2021}}</ref>