Editing Programmable logic device (section)

== PLD programming languages ==
Many PAL programming devices accept input in a standard file format, commonly referred to as '[[JEDEC]] files'. They are analogous to [[software]] [[compiler]]s. The languages used as [[source code]] for logic compilers are called [[hardware description language]]s, or HDLs.<ref name="HorowitzHillArts2015" />

[[PALASM]], [[Advanced Boolean Expression Language|ABEL]] and [[Programmable Array Logic#CUPL|CUPL]] are frequently used for low-complexity devices, while [[Verilog]] and [[VHDL]] are popular higher-level description languages for more complex devices. The more limited ABEL is often used for historical reasons, but for new designs, VHDL is more popular, even for low-complexity designs.

For modern PLD programming languages, design flows, and tools, see [[FPGA]] and [[reconfigurable computing]].