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==BCD in computers== ===IBM=== {{Main|BCDIC}} IBM used the terms ''[[Binary-Coded Decimal Interchange Code]]'' (BCDIC, sometimes just called BCD), for 6-bit ''[[alphanumeric]]'' codes that represented numbers, upper-case letters and special characters. Some variation of BCDIC ''alphamerics'' is used in most early IBM computers, including the [[IBM 1620]] (introduced in 1959), [[IBM 1400 series]], and non-[[IBM 700/7000 series#Decimal architecture (7070/7072/7074)|decimal architecture]] members of the [[IBM 700/7000 series]]. The IBM 1400 series are character-addressable machines, each location being six bits labeled ''B, A, 8, 4, 2'' and ''1,'' plus an odd parity check bit (''C'') and a word mark bit (''M''). For encoding digits ''1'' through ''9'', ''B'' and ''A'' are zero and the digit value represented by standard 4-bit BCD in bits ''8'' through ''1''. For most other characters bits ''B'' and ''A'' are derived simply from the "12", "11", and "0" "zone punches" in the [[punched card]] character code, and bits ''8'' through ''1'' from the ''1'' through ''9'' punches. A "12 zone" punch set both ''B'' and ''A'', an "11 zone" set ''B'', and a "0 zone" (a 0 punch combined with any others) set ''A''. Thus the letter '''A''', which is ''(12,1)'' in the punched card format, is encoded ''(B,A,1)''. The currency symbol '''$''', ''(11,8,3)'' in the punched card, was encoded in memory as ''(B,8,2,1)''. This allows the circuitry to convert between the punched card format and the internal storage format to be very simple with only a few special cases. One important special case is digit ''0'', represented by a lone ''0'' punch in the card, and ''(8,2)'' in core memory.<ref name="Van1401"/> The memory of the IBM 1620 is organized into 6-bit addressable digits, the usual ''8, 4, 2, 1'' plus ''F'', used as a flag bit and ''C'', an odd parity check bit. BCD ''alphamerics'' are encoded using digit pairs, with the "zone" in the even-addressed digit and the "digit" in the odd-addressed digit, the "zone" being related to the ''12'', ''11'', and ''0'' "zone punches" as in the 1400 series. Input/output translation hardware converted between the internal digit pairs and the external standard 6-bit BCD codes. In the decimal architecture [[IBM 7070]], [[IBM 7072]], and [[IBM 7074]] ''alphamerics'' are encoded using digit pairs (using [[two-out-of-five code]] in the digits, '''not''' BCD) of the 10-digit word, with the "zone" in the left digit and the "digit" in the right digit. Input/output translation hardware converted between the internal digit pairs and the external standard 6-bit BCD codes. With the introduction of [[System/360]], IBM expanded 6-bit BCD ''alphamerics'' to 8-bit EBCDIC, allowing the addition of many more characters (e.g., lowercase letters). A variable length packed BCD ''numeric'' data type is also implemented, providing machine instructions that perform arithmetic directly on packed decimal data. On the [[IBM 1130]] and [[IBM 1800|1800]], packed BCD is supported in software by IBM's Commercial Subroutine Package. Today, BCD data is still heavily used in IBM databases such as [[IBM Db2]] and processors such as [[z/Architecture]] and [[POWER6]] and later [[Power ISA]] processors. In these products, the BCD is usually zoned BCD (as in EBCDIC or ASCII), packed BCD (two decimal digits per byte), or "pure" BCD encoding (one decimal digit stored as BCD in the low four bits of each byte). All of these are used within hardware registers and processing units, and in software. === Other computers === The Digital Equipment Corporation [[VAX]] series includes [[Instruction set|instructions]] that can perform arithmetic directly on packed BCD data and convert between packed BCD data and other integer representations.<ref name="DEC_1985_VAX11"/> The VAX's packed BCD format is compatible with that on IBM System/360 and IBM's later compatible processors. The MicroVAX and later VAX implementations dropped this ability from the CPU but retained code compatibility with earlier machines by implementing the missing instructions in an operating system-supplied software library. This is invoked automatically via [[exception handling]] when the defunct instructions are encountered, so that programs using them can execute without modification on the newer machines. Many processors have hardware support for BCD-encoded integer arithmetic. For example, the [[6502]],<ref>{{cite web |url=http://www.masswerk.at/6502/6502_instruction_set.html |title=6502 Instruction Set |archive-url=https://web.archive.org/web/20180508053805/http://www.masswerk.at/6502/6502_instruction_set.html |archive-date=2018-05-08 |url-status=live}}</ref><ref>{{cite web |url=http://www.6502.org/tutorials/6502opcodes.html |title=NMOS 6502 Opcodes |archive-url=https://web.archive.org/web/20160114001557/http://www.6502.org/tutorials/6502opcodes.html |archive-date=2016-01-14}}</ref> the [[Motorola 68000 series]],<ref name="Motorola_m68k"/> and the [[x86]] series.<ref>{{cite book|url= http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-1-manual.pdf|title= Intel 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture|at= Section 4.7|publisher= Intel|date= March 2013|access-date= April 23, 2013|archive-date= April 2, 2013|archive-url= https://web.archive.org/web/20130402233513/http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-1-manual.pdf|url-status= live}}</ref> The [[Intel]] x86 architecture supports a [[Intel BCD opcodes|unique 18-digit (ten-byte) BCD format]] that can be loaded into and stored from the floating point registers, from where computations can be performed.<ref name="Intel_2020_V1"/> In more recent computers such capabilities are almost always implemented in software rather than the CPU's instruction set, but BCD numeric data are still extremely common in commercial and financial applications. There are tricks for implementing packed BCD and zoned decimal add–or–subtract operations using short but difficult to understand sequences of word-parallel logic and binary arithmetic operations.<ref name="Jones_1999_AT" /> For example, the following code (written in [[C (programming language)|C]]) computes an unsigned 8-digit packed BCD addition using 32-bit binary operations: <syntaxhighlight lang="c"> uint32_t BCDadd(uint32_t a, uint32_t b) { uint32_t t1, t2; // unsigned 32-bit intermediate values t1 = a + 0x06666666; t2 = t1 ^ b; // sum without carry propagation t1 = t1 + b; // provisional sum t2 = t1 ^ t2; // all the binary carry bits t2 = ~t2 & 0x11111110; // just the BCD carry bits t2 = (t2 >> 2) | (t2 >> 3); // correction return t1 - t2; // corrected BCD sum } </syntaxhighlight>
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