Editing Current mirror (section)

==== Compliance voltage ====
To keep the output transistor resistance high, ''V''<sub>DG</sub> ≥ 0&nbsp;V.<ref group="nb">Keeping the output resistance high means more than keeping the MOSFET in active mode, because the output resistance of real MOSFETs only begins to increase on entry into the active region, then rising to become close to maximum value only when ''V<sub>DG</sub>'' ≥ 0 V.</ref> (see Baker).<ref name=Baker>
{{cite book
 |author=R. Jacob Baker
 |title=CMOS Circuit Design, Layout and Simulation
 |url=https://archive.org/details/cmoscircuitdesig00bake_827
 |url-access=limited
 |edition=Third
 |year= 2010
 |pages=[https://archive.org/details/cmoscircuitdesig00bake_827/page/n333 297], §9.2.1 and Figure 20.28, p. 636
 |publisher=Wiley-IEEE
 |location=New York
 |isbn=978-0-470-88132-3
}}</ref> That means the lowest output voltage that results in correct mirror behavior, the compliance voltage, is ''V''<sub>OUT</sub> = ''V''<sub>CV</sub> = ''V''<sub>GS</sub> for the output transistor at the output current level with ''V''<sub>DG</sub> = 0&nbsp;V, or using the inverse of the ''f''-function, {{itco|''f''}}<sup>−1</sup>:
: <math>V_\text{CV} = V_\text{GS} (\text{for}\ I_\text{D}\ \text{at} \ V_\text{DG} = 0V) = f^{-1}(I_\text{D}) \ \text{with}\ V_\text{DG} = 0 \ .</math>

For the Shichman–Hodges model, {{itco|''f''}}<sup>−1</sup> is approximately a square-root function.