Editing Nios II (section)

== Development processes ==
Development for Nios II consists of two separate steps: hardware generation and software creation.

Development is hosted inside an Altera application called the Embedded Design Suite (EDS). The EDS contains a complete integrated development environment to manage both hardware and software in two separate steps:

=== Hardware generation process ===
Nios II hardware designers use the Qsys system integration tool, a component of the Quartus-II package, to configure and generate a Nios system. The configuration [[graphical user interface]] (GUI) allows users to choose the Nios-II's feature-set, and to add peripheral and I/O-blocks (timers, memory-controllers, serial interface, etc.) to the embedded system. When the hardware specification is complete, Quartus-II performs the synthesis, place & route to implement the entire system on the selected FPGA target.<br />
Qsys is replacing the older SOPC (System-on-a-Programmable-Chip) Builder, which could also be used to build a Nios II system, and is being recommended for new projects.<ref name=Altera>{{cite web|title=5 Reasons to Switch from SOPC Builder to Qsys|url=http://www.altera.com/education/webcasts/all/wc-2011-reasons-switch-qsys.html|publisher=Altera|access-date=16 March 2012}}</ref>

=== Software creation process ===
A separate package, called the Embedded Design Suite (EDS), manages the software development. Based on the [[Eclipse (software)|Eclipse]] IDE, the EDS includes a C/C++ compiler (based on the [[GNU toolchain]]), debugger, and an instruction-set simulator. EDS allows programmers to test their application in simulation, or download and run their compiled application on the actual FPGA host.

Because the C/C++ development-chain is based on [[GNU Compiler Collection|GCC]], the vast majority of [[Open-source software|open source]] software for [[Linux]] compiles and runs with minimal or no modification. Third-party operating-systems have also been ported to Nios II. These include Micrium [[MicroC/OS-II]], [[eCos]], [[Segger_Microcontroller_Systems|Segger Microcontroller]] embOS, [[ChibiOS/RT]], [[μCLinux]] and [[FreeRTOS]].

GCC 15 removed support for Nios II processors due to Nios II's discontinuation.<ref>{{Cite web |title=GCC 15 Ends Support For Altera Nios II Embedded Processors |url=https://www.phoronix.com/news/GCC-15-Drops-Altera-Nios-II |access-date=2025-01-22 |website=www.phoronix.com |language=en}}</ref>

=== Licensing ===
Nios II is comparable to [[MicroBlaze]], a competing [[Soft microprocessor|softcore CPU]] for the [[Xilinx]] family of FPGA. Unlike MicroBlaze, Nios II is licensable for standard-cell [[Application-specific integrated circuit|ASIC]]s through a third-party IP provider, [[Synopsys]] Designware. Through the Designware license, designers can port Nios-based designs from an FPGA-platform to a mass production ASIC-device.