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Orthogonal instruction set
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==RISC== A number of studies through the 1970s demonstrated that the flexibility offered by orthogonal modes was rarely or never used in actual problems. In particular, an effort at [[IBM]] studied traces of code running on the [[System/370]] and demonstrated that only a fraction of the available modes were being used in actual programs. Similar studies, often about the VAX, demonstrated the same pattern. In some cases, it was shown that the complexity of the instructions meant they took longer to perform than the sequence of smaller instructions, with the canonical example of this being the VAX's <code>INDEX</code> instruction.<ref name=PattersonDitzel>{{Cite journal | last1 = Patterson | first1 = D. A. | author-link1 = David Patterson (scientist)| last2 = Ditzel | first2 = D. R. | author-link2 = David Ditzel| doi = 10.1145/641914.641917 | title = The case for the reduced instruction set computer | journal = [[ACM SIGARCH Computer Architecture News]] | volume = 8 | issue = 6 | pages = 25β33| year = 1980 | citeseerx = 10.1.1.68.9623| s2cid = 12034303 }}</ref> During this same period, semiconductor memories were rapidly increasing in size and decreasing in cost. However, they were not improving in speed at the same rate. This meant the time needed to access data from memory was growing in ''relative'' terms in comparison to the speed of the CPUs. This argued for the inclusion of more registers, giving the CPU more temporary values to work with. A larger number of registers meant more bits in the computer word would be needed to encode the register number, which suggested that the instructions themselves be reduced in number to free up room. Finally, a paper by [[Andrew S. Tanenbaum|Andrew Tanenbaum]] demonstrated that 97% of all the constants in a program are between 0 and 10, with 0 representing between 20 and 30% of the total. Additionally, between 30 and 40% of all the values in a program are constants, with simple variables (as opposed to arrays or such) another 35 to 40%.<ref>{{cite journal |first=Andrew |last= Tanenbaum |journal=Communications of the ACM |volume=21 |issue=3 |pages=237β246 |doi=10.1145/359361.359454 |title= Implications of structured programming for machine architecture |year= 1978 |hdl= 1871/2610 |s2cid= 3261560 |url= https://research.vu.nl/en/publications/5d0953e3-569e-4fa3-924a-0e56a80b550b |doi-access=free }}</ref> If the processor uses a larger instruction word, like 32-bits, two register numbers and a constant can be encoded in a single instruction as long as the instruction itself does not use too many bits. These observations led to the abandonment of the orthogonal design as a primary goal of processor design, and the rise of the [[RISC]] philosophy in the 1980s. RISC processors generally have only two addressing modes, direct (constant) and register. All of the other modes found in older processors are handled explicitly using load and store instructions moving data to and from the registers. Only a few [[addressing mode]]s may be available, and these modes may vary depending on whether the instruction refers to data or involves a [[Branch (computer science)|transfer of control]].
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