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===Synthetic instructions=== As noted earlier, the SPARC assembler uses "synthetic instructions" to ease common coding tasks. Additional examples include (among others):<ref name=ncsu/> {| class="wikitable" |+ SPARC synthetic instructions |- ! mnemonic ! actual output ! purpose |- | {{code|nop|asm}} || {{code|sethi 0,%g0|asm}} || do nothing |- | {{code|clr %reg|asm}} || {{code|or %g0,%g0,%reg|asm}} || set a register to zero |- | {{code|clr [address]|asm}} || {{code|st %g0,[address]|asm}} || set a memory address to zero |- | {{code|clrh [address]|asm}} || {{code|sth %g0,[address]|asm}} || set the half-word at memory address to zero |- | {{code|clrb [address]|asm}} || {{code|stb %g0,[address]|asm}} || set the byte at memory address to zero |- | {{code|cmp %reg1,%reg2|asm}} || {{code|subcc %reg1,%reg2,%g0|asm}} || compare two registers, set codes, discard results |- | {{code|cmp %reg,const|asm}} || {{code|subcc %reg,const,%g0|asm}} || compare register with constant |- | {{code|mov %reg1,%reg2|asm}} || {{code|or %g0,%reg1,%reg2|asm}} || copy value from one register to another |- | {{code|mov const,%reg|asm}} || {{code|or %g0,const,%reg|asm}} || copy constant value into a register |- | {{code|inc %reg|asm}} || {{code|add %reg,1,%reg|asm}} || increment a register |- | {{code|inccc %reg|asm}} || {{code|addcc %reg,1,%reg|asm}} || increment a register, set conditions |- | {{code|dec %reg|asm}} || {{code|sub %reg,1,%reg|asm}} || decrement a register |- | {{code|deccc %reg|asm}} || {{code|subcc %reg,1,%reg|asm}} || decrement a register, set conditions |- | {{code|not %reg|asm}} || {{code|xnor %reg,%g0,%reg|asm}} || flip the bits in a register |- | {{code|neg %reg|asm}} || {{code|sub %g0,%reg,%reg|asm}} || two's complement a register |- | {{code|tst %reg|asm}} || {{code|orcc %reg,%g0,%g0|asm}} || test whether the value in a register is > 0, 0, or < 0 |}
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