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=== Disadvantages === Douglas W.Jones made a series of computations and designs algorithms of ternary system on his homepage under the name ''the Trenary Manifesto'', including fast ternary addition, multiplication, and division. It turns out that much of the improved efficiency in the interconnection and digit representation is balanced out by requiring more gates in the computations. For example, the ternary addition, while achieving the same computational speed as binary addition, requires <math>62\%</math> more logic.'''<ref name="Jones"/>''' Meanwhile, many have suggested that ternary circuits are hard to develop, especially when most modern digital flows are binary.<ref name=":1">{{Cite journal |last1=Etiemble |first1=D. |last2=Israel |first2=M. |date=April 1988 |title=Comparison of binary and multivalued ICs according to VLSI criteria |url=https://doi.org/10.1109/2.49 |journal=Computer |volume=21 |issue=4 |pages=28β42 |doi=10.1109/2.49 |issn=0018-9162}}</ref><ref>{{Cite journal |last1=Nair |first1=Ravi |last2=Smith |first2=Scott |last3=Di |first3=Jia |date=2015-09-11 |title=Delay Insensitive Ternary CMOS Logic for Secure Hardware |journal=Journal of Low Power Electronics and Applications |language=en |volume=5 |issue=3 |pages=183β215 |doi=10.3390/jlpea5030183 |doi-access=free |issn=2079-9268}}</ref> In the paper ''Comparison of Binary and Multivalued ICs According to VLSI Criteria'' written by Daniel Etiemble & Michel IsraΓ«l, the authors compared binary and multivalued integrated circuits by examining their performance in detail, and discovered that while the design of multivalued circuits are valid and useful, they have not surpassed the binary circuits. They wrote in the conclusion that <ref name=":1" />{{blockquote|Multi-valued circuits and two-valued circuits must not be seen as competitors. If they are seen as such, then two-valued circuits have already won.}}
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