Editing Addressing mode (section)

===Skip===
    +------+-----+-----+
    |skipEQ| reg1| reg2|      skip the next instruction if reg1=reg2
    +------+-----+-----+
 
    (Effective PC address = next instruction address + 1)

Skip addressing may be considered a special kind of PC-relative addressing mode with fixed offsets.{{efn|Most often just NSI+1 on word-oriented machines, but, e.g., the Compare Accumulator and Skip (CAS) on the [[IBM 7090]] can skip to NSI+1 or NSI+2.}} Like PC-relative addressing, some CPUs have versions of this addressing mode that only refer to one register ("skip if reg1=0") or no registers, implicitly referring to some previously-set bit in the [[status register]]. Other CPUs have a version that selects a specific bit in a specific byte to test ("skip if bit 7 of reg12 is 0").

Unlike all other conditional branches, a "skip" instruction never needs to flush the [[instruction pipeline]], though it may need to cause the next instruction to be ignored.